Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: The method is applied to the recording device, and the recording device is connected to a set-top box. The error proof method includes following steps. In the beginning, whether a startup process of the set-top box has been finished is determined according to a video signal and an audio signal outputted from the set-top box. After the startup process of the set-top box is finished, the video signal outputted from the set-top box is analyzed to determine whether an image of the video signal is covered by an information window. If the image of the video signal is not covered by any information window, then a channel changing signal is transmitted to the set-top box, to change a channel of the set-top box to a reserved recording channel. After that, a television program of the reserved recording channel is recorded.