Patents by Inventor Stephane Monfray

Stephane Monfray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7436005
    Abstract: The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two isolating zones. The transistor includes a narrow heterostructure strained-semiconductor channel including a SiGe alloy layer in compression and a silicon layer in tension, extending between the gate and a dielectric block buried in the substrate.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: October 14, 2008
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat a l'Energie Atomique
    Inventors: Stéphane Monfray, Stéphan Borel, Thomas Skotnicki
  • Patent number: 7378692
    Abstract: An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an insulating material disposed on a substrate. The active component is formed within a volume of substantially single-crystal semiconductor material disposed on top of the passive component.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: May 27, 2008
    Assignee: STMicroelectronics SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer, Stephane Monfray
  • Publication number: 20080087959
    Abstract: A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.
    Type: Application
    Filed: March 2, 2007
    Publication date: April 17, 2008
    Applicants: STMicroelectronics S.A., Commissariat A L'energie Atomique
    Inventors: Stephane Monfray, Aomar Halimaoui, Philippe Coronel, Damien Lenoble, Claire Fenouillet-Beranger
  • Publication number: 20080020532
    Abstract: A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator.
    Type: Application
    Filed: March 16, 2007
    Publication date: January 24, 2008
    Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Stephane Monfray, Thomas Skotnicki, Didier Dutartre, Alexandre Talbot
  • Publication number: 20070200198
    Abstract: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block that forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.
    Type: Application
    Filed: February 7, 2007
    Publication date: August 30, 2007
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Thomas Skotnicki, Stephane Monfray
  • Publication number: 20070202644
    Abstract: This process for manufacturing a Schottky-barrier MOS transistor on a fully depleted semiconductor film may include depositing a first layer of a first sacrificial material on an active zone of the substrate, forming a silicon layer on top of the first layer of sacrificial material, forming a gate region on top of the silicon layer with interposition of a gate oxide layer, and selective etching of the sacrificial material so as to form a tunnel beneath the gate region. The tunnel is filled with a dielectric second sacrificial material. A controlled lateral etching of the second sacrificial material is performed so as to keep behind a zone of dielectric material beneath the gate region. Silicidation is performed at the location of the source region and drain region and at the location of the etched zone.
    Type: Application
    Filed: February 7, 2007
    Publication date: August 30, 2007
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Thomas Skotnicki, Stephane Monfray
  • Patent number: 7229867
    Abstract: A substrate supporting a portion of a semiconductor material is used to produce a field-effect transistor. A portion of a temporary material lies between the portion of semiconductor material and the substrate. A gate is formed, which comprises an upper part in rigid connection with the portion of semiconductor material, and at least one bearing part settled on the substrate. The temporary material is removed and replaced with an electrically insulating material. During removal and replacement of the temporary material, the portion of semiconductor material is held in place relative to the substrate by the gate.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: June 12, 2007
    Assignee: STMicroelectronics SA
    Inventors: Thomas Skotnicki, Daniel Chanemougame, Stephane Monfray
  • Patent number: 7202137
    Abstract: A process for producing an integrated electronic circuit. The process begins with the production of a first electronic component and a second electronic component that are superposed on top of a substrate. A volume of temporary material is formed on the substrate at the position of the second electronic component. The first electronic component is then produced above the volume of temporary material relative to the substrate, and then the second electronic component is produced using at least one shaft for access to the temporary material. The first electronic component may be an active component and the second electronic component may be a passive component.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: April 10, 2007
    Assignee: STMicroelectronics SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer, Stephane Monfray
  • Patent number: 7196451
    Abstract: An electromechanical resonator includes a monocrystalline-silicon substrate (S) provided with an active zone (ZA) delimited by an insulating region, a vibrating beam (10) anchored by at least one of its free ends on the insulating region and including a monocrystalline-silicon vibrating central part (12), and a control electrode (E) arranged above the beam and bearing on the active zone. The central part (12) of the beam is separated from the active zone (ZA) and from the control electrode (E).
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: March 27, 2007
    Assignee: STMicroelectronics SA
    Inventors: Stephane Monfray, Pascal Ancey, Thomas Skotnicki, Karim Segueni
  • Publication number: 20060189057
    Abstract: An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an insulating material disposed on a substrate. The active component is formed within a volume of substantially single-crystal semiconductor material disposed on top of the passive component.
    Type: Application
    Filed: April 27, 2006
    Publication date: August 24, 2006
    Applicant: STMicroelectronics SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer, Stephane Monfray
  • Publication number: 20060081876
    Abstract: The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two isolating zones. The transistor includes a narrow heterostructure strained-semiconductor channel including a SiGe alloy layer in compression and a silicon layer in tension, extending between the gate and a dielectric block buried in the substrate.
    Type: Application
    Filed: September 15, 2005
    Publication date: April 20, 2006
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique
    Inventors: Stephane Monfray, Stephan Borel, Thomas Skotnicki
  • Patent number: 6969878
    Abstract: A semiconductor device is provided that includes a semiconductor channel region extending above a semiconductor substrate in a longitudinal direction between a semiconductor source region and a semiconductor drain region, and a gate region extending in the transverse direction, coating the channel region, and insulated from the channel region. The source, channel, and drain regions are formed in a continuous semiconductor layer that is approximately plane and parallel to the upper surface of the substrate. Additionally, the source, drain, and gate regions are coated in an insulating coating so as to provide electrical insulation between the gate region and the source and drain regions, and between the substrate and the source, drain, gate, and channel regions. Also provided is an integrated circuit that includes such a semiconductor device, and a method for manufacturing such a semiconductor device.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: November 29, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Philippe Coronel, Stephane Monfray, Thomas Skotnicki
  • Publication number: 20050214993
    Abstract: A substrate supporting a portion of a semiconductor material is used to produce a field-effect transistor. A portion of a temporary material lies between the portion of semiconductor material and the substrate. A gate is formed, which comprises an upper part in rigid connection with the portion of semiconductor material, and at least one bearing part settled on the substrate. The temporary material is removed and replaced with an electrically insulating material. During removal and replacement of the temporary material, the portion of semiconductor material is held in place relative to the substrate by the gate.
    Type: Application
    Filed: February 3, 2005
    Publication date: September 29, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Thomas Skotnicki, Daniel Chanemougame, Stephane Monfray
  • Publication number: 20050199970
    Abstract: An electromechanical resonator includes a monocrystalline-silicon substrate (S) provided with an active zone (ZA) delimited by an insulating region, a vibrating beam (10) anchored by at least one of its free ends on the insulating region and including a monocrystalline-silicon vibrating central part (12), and a control electrode (E) arranged above the beam and bearing on the active zone. The central part (12) of the beam is separated from the active zone (ZA) and from the control electrode (E).
    Type: Application
    Filed: July 21, 2004
    Publication date: September 15, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Stephane Monfray, Pascal Ancey, Thomas Skotnicki, Karim Segueni
  • Publication number: 20050085026
    Abstract: A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.
    Type: Application
    Filed: October 7, 2004
    Publication date: April 21, 2005
    Inventors: Stephane Monfray, Aomar Halimaoui, Philippe Coronel, Damien Lenoble, Claire Fenouillet-Beranger
  • Publication number: 20050037593
    Abstract: A process for producing an integrated electronic circuit comprises the production of a first electronic component and a second electronic component that are superposed on top of a substrate. A volume of temporary material is formed on the substrate at the position of the second electronic component. The first electronic component is then produced above the volume of temporary material relative to the substrate, and then the second electronic component is produced using at least one shaft for access to the temporary material. The first electronic component may be an active component and the second electronic component may be a passive component.
    Type: Application
    Filed: May 20, 2004
    Publication date: February 17, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer, Stephane Monfray
  • Patent number: 6852993
    Abstract: An integrated circuit includes a semiconductor device forming a single photon source, and includes a MOS transistor on a silicon substrate. The MOS transistor has a mushroom shaped gate for outputting a single electron on its drain in a controlled manner in response to a control voltage applied to its gate. The transistor also includes at least one silicon compatible quantum box. The quantum box is electrically coupled to the drain region of the transistor, and is capable of outputting a single photon on reception of a single electron emitted by the transistor.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: February 8, 2005
    Assignee: STMicroelectronics SA
    Inventors: Stéphane Monfray, Didier Dutartre, Frédéric Boeuf
  • Patent number: 6724660
    Abstract: An electronic device, such as an opto-electronic device and an integrated semiconductor memory device, includes at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. A biasing voltage source is adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: April 20, 2004
    Assignee: STMicroelectronics S.A.
    Inventors: Thomas Skotnicki, Stephane Monfray, Michel Haond
  • Publication number: 20040016968
    Abstract: A semiconductor device is provided that includes a semiconductor channel region extending above a semiconductor substrate in a longitudinal direction between a semiconductor source region and a semiconductor drain region, and a gate region extending in the transverse direction, coating the channel region, and insulated from the channel region. The source, channel, and drain regions are formed in a continuous semiconductor layer that is approximately plane and parallel to the upper surface of the substrate. Additionally, the source, drain, and gate regions are coated in an insulating coating so as to provide electrical insulation between the gate region and the source and drain regions, and between the substrate and the source, drain, gate, and channel regions. Also provided is an integrated circuit that includes such a semiconductor device, and a method for manufacturing such a semiconductor device.
    Type: Application
    Filed: April 8, 2003
    Publication date: January 29, 2004
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Philippe Coronel, Stephane Monfray, Thomas Skotnicki
  • Patent number: 6656782
    Abstract: The source, drain and channel regions are produced in a silicon layer, completely isolated vertically from a carrier substrate by an insulating layer, and are bounded laterally by a lateral isolation region of the shallow trench type.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: December 2, 2003
    Assignee: STMicroelectronics SA
    Inventors: Thomas Skotnicki, Stéphane Monfray, Alexandre Villaret