Abstract: In an example, a method includes providing a signal to a driver for a switching voltage regulator to turn off a high-side field effect transistor (FET) of the switching voltage regulator. The method also includes reducing a voltage at a source of the high-side FET. The method includes responsive to the signal, turning off a pull-down FET coupled to a gate of the high-side FET. The method also includes commutating current from the high-side FET to a low-side FET.

Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.

Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.

Abstract: An integrated circuit having at least one electrically-controlled control loop that includes one or more loop error amplifiers also includes an analog-to-digital converter having both an input that operably couples to two inputs of each loop error amplifier and an output that couples to an off-chip hardware component comprising a control circuit. This control circuit reads digital versions that correspond to the loop error amplifier inputs. When a particular first input is greater than a second input, the control circuit sources a calibration signal to modify and offset for the loop error amplifier in a first direction. When the first input is less than the second input, the control circuit sources a calibration signal to modify the offset for the loop error amplifier in a second direction that is different from the aforementioned first direction. By one approach the control circuit also controls a sampling rate of the analog-to-digital converter.