Patents by Inventor Stephen M. Rossnagel

Stephen M. Rossnagel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10818590
    Abstract: Techniques for improving reliability in Cu interconnects using Cu intermetallics are provided. In one aspect, a method of forming a Cu interconnect in a dielectric over a Cu line includes the steps of: forming at least one via in the dielectric over the Cu line; depositing a metal layer onto the dielectric and lining the via such that the metal layer is in contact with the Cu line at the bottom of the via, wherein the metal layer comprises at least one metal that can react with Cu to form a Cu intermetallic; annealing the metal layer and the Cu line under conditions sufficient to form a Cu intermetallic barrier at the bottom of the via; and plating Cu into the via to form the Cu interconnect, wherein the Cu interconnect is separated from the Cu line by the Cu intermetallic barrier. A device structure is also provided.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: October 27, 2020
    Assignee: International Business Machines Corporation
    Inventors: Chao-Kun Hu, Christian Lavoie, Stephen M. Rossnagel, Thomas M. Shaw
  • Publication number: 20200251336
    Abstract: A hard mask and a method of creating thereof are provided. A first layer is deposited that is configured to provide at least one of a chemical and a mechanical adhesion to a layer immediately below it. A second layer is deposited having an etch selectivity that is faster than the first layer. A third layer is deposited having an etch selectivity that is slower than the first and second layers. The third layer has a composite strength that is higher than the first and second layers. A photoresist layer is deposited on top of the third layer and chemically removed above an inner opening. The third layer and part of the second layer are anisotropically etched through the inner opening. The second layer and the first layer are isotropically etched to create overhang regions of the third layer.
    Type: Application
    Filed: April 18, 2020
    Publication date: August 6, 2020
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Patent number: 10720670
    Abstract: A solid state electrochemical battery and a method of creation thereof are provided. There is a first conductive electrode on top of a substrate. There is a first polar conductor layer on top of the conductive electrode layer. A first solid electrolyte layer is on top of the first polar conductor layer. There is a second polar conductor layer on top of the first solid electrolyte layer and a second conductive electrode layer on top of the second polar conductor layer. A third polar conductor layer is on top of the second conductive electrode layer and a second solid electrolyte layer is on top of the third polar conductor layer. There is a fourth polar conductor layer on top of the second solid electrolyte layer and a third conductive electrode layer on top of the fourth polar conductor layer.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: July 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Patent number: 10679853
    Abstract: A hard mask and a method of creating thereof are provided. A first layer is deposited that is configured to provide at least one of a chemical and a mechanical adhesion to a layer immediately below it. A second layer is deposited having an etch selectivity that is faster than the first layer. A third layer is deposited having an etch selectivity that is slower than the first and second layers. The third layer has a composite strength that is higher than the first and second layers. A photoresist layer is deposited on top of the third layer and chemically removed above an inner opening. The third layer and part of the second layer are anisotropically etched through the inner opening. The second layer and the first layer are isotropically etched to create overhang regions of the third layer.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: June 9, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Publication number: 20200006227
    Abstract: Techniques for improving reliability in Cu interconnects using Cu intermetallics are provided. In one aspect, a method of forming a Cu interconnect in a dielectric over a Cu line includes the steps of: forming at least one via in the dielectric over the Cu line; depositing a metal layer onto the dielectric and lining the via such that the metal layer is in contact with the Cu line at the bottom of the via, wherein the metal layer comprises at least one metal that can react with Cu to form a Cu intermetallic; annealing the metal layer and the Cu line under conditions sufficient to form a Cu intermetallic barrier at the bottom of the via; and plating Cu into the via to form the Cu interconnect, wherein the Cu interconnect is separated from the Cu line by the Cu intermetallic barrier. A device structure is also provided.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Chao-Kun Hu, Christian Lavoie, Stephen M. Rossnagel, Thomas M. Shaw
  • Publication number: 20200006226
    Abstract: Techniques for improving reliability in Cu interconnects using Cu intermetallics are provided. In one aspect, a method of forming a Cu interconnect in a dielectric over a Cu line includes the steps of: forming at least one via in the dielectric over the Cu line; depositing a metal layer onto the dielectric and lining the via such that the metal layer is in contact with the Cu line at the bottom of the via, wherein the metal layer comprises at least one metal that can react with Cu to form a Cu intermetallic; annealing the metal layer and the Cu line under conditions sufficient to form a Cu intermetallic barrier at the bottom of the via; and plating Cu into the via to form the Cu interconnect, wherein the Cu interconnect is separated from the Cu line by the Cu intermetallic barrier. A device structure is also provided.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Chao-Kun Hu, Christian Lavoie, Stephen M. Rossnagel, Thomas M. Shaw
  • Patent number: 10461026
    Abstract: Techniques for improving reliability in Cu interconnects using Cu intermetallics are provided. In one aspect, a method of forming a Cu interconnect in a dielectric over a Cu line includes the steps of: forming at least one via in the dielectric over the Cu line; depositing a metal layer onto the dielectric and lining the via such that the metal layer is in contact with the Cu line at the bottom of the via, wherein the metal layer comprises at least one metal that can react with Cu to form a Cu intermetallic; annealing the metal layer and the Cu line under conditions sufficient to form a Cu intermetallic barrier at the bottom of the via; and plating Cu into the via to form the Cu interconnect, wherein the Cu interconnect is separated from the Cu line by the Cu intermetallic barrier. A device structure is also provided.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 29, 2019
    Assignee: International Business Machines Corporation
    Inventors: Chao-Kun Hu, Christian Lavoie, Stephen M. Rossnagel, Thomas M. Shaw
  • Publication number: 20190323138
    Abstract: Nanofluidic passages such as nanochannels and nanopores are closed or opened in a controlled manner through the use of a feedback system. An oxide layer is grown or removed within a passage in the presence of an electrolyte until the passage reaches selected dimensions or is closed. The change in dimensions of the nanofluidic passage is measured during fabrication. The ionic current level through the passage can be used to determine passage dimensions. Fluid flow through an array of fluidic elements can be controlled by selective oxidation of fluidic passages between elements.
    Type: Application
    Filed: June 17, 2019
    Publication date: October 24, 2019
    Inventors: Stefan Harrer, Stephen M. Rossnagel, Philip S. Waggoner
  • Publication number: 20190244815
    Abstract: A hard mask and a method of creating thereof are provided. A first layer is deposited that is configured to provide at least one of a chemical and a mechanical adhesion to a layer immediately below it. A second layer is deposited having an etch selectivity that is faster than the first layer. A third layer is deposited having an etch selectivity that is slower than the first and second layers. The third layer has a composite strength that is higher than the first and second layers. A photoresist layer is deposited on top of the third layer and chemically removed above an inner opening. The third layer and part of the second layer are anisotropically etched through the inner opening. The second layer and the first layer are isotropically etched to create overhang regions of the third layer.
    Type: Application
    Filed: February 8, 2018
    Publication date: August 8, 2019
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Publication number: 20190245246
    Abstract: A solid state electrochemical battery fabrication device and a method of creating the solid state electrochemical battery are provided. There is a first chamber comprising a first magnetron and a second chamber comprising a second magnetron, coupled to the first chamber. There is a third chamber comprising a vapor source for a polymer deposition, coupled to the second chamber. A Knudsen cell is coupled to the third chamber and configured to deposit lithium on a battery being fabricated. A linear hollow shaft connects the first, second, and third chambers, and provides a hermetic seal. A first telescopic arm having a housing is coupled to a first end of the hollow shaft and configured to extend out of its housing from the first chamber to the second chamber.
    Type: Application
    Filed: February 8, 2018
    Publication date: August 8, 2019
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Publication number: 20190245247
    Abstract: A solid state electrochemical battery and a method of creation thereof are provided. There is a first conductive electrode on top of a substrate. There is a first polar conductor layer on top of the conductive electrode layer. A first solid electrolyte layer is on top of the first polar conductor layer. There is a second polar conductor layer on top of the first solid electrolyte layer and a second conductive electrode layer on top of the second polar conductor layer. A third polar conductor layer is on top of the second conductive electrode layer and a second solid electrolyte layer is on top of the third polar conductor layer. There is a fourth polar conductor layer on top of the second solid electrolyte layer and a third conductive electrode layer on top of the fourth polar conductor layer.
    Type: Application
    Filed: February 8, 2018
    Publication date: August 8, 2019
    Inventors: Frank Robert Libsch, Ghavam G. Shahidi, Ko-Tao Lee, Stephen M. Rossnagel
  • Patent number: 10323333
    Abstract: Nanofluidic passages such as nanochannels and nanopores are closed or opened in a controlled manner through the use of a feedback system. An oxide layer is grown or removed within a passage in the presence of an electrolyte until the passage reaches selected dimensions or is closed. The change in dimensions of the nanofluidic passage is measured during fabrication. The ionic current level through the passage can be used to determine passage dimensions. Fluid flow through an array of fluidic elements can be controlled by selective oxidation of fluidic passages between elements.
    Type: Grant
    Filed: August 20, 2016
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stefan Harrer, Stephen M. Rossnagel, Philip S. Waggoner
  • Patent number: 10316423
    Abstract: Nanofluidic passages such as nanochannels and nanopores are closed or opened in a controlled manner through the use of a feedback system. An oxide layer is grown or removed within a passage in the presence of an electrolyte until the passage reaches selected dimensions or is closed. The change in dimensions of the nanofluidic passage is measured during fabrication. The ionic current level through the passage can be used to determine passage dimensions. Fluid flow through an array of fluidic elements can be controlled by selective oxidation of fluidic passages between elements.
    Type: Grant
    Filed: August 20, 2016
    Date of Patent: June 11, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stefan Harrer, Stephen M. Rossnagel, Philip S. Waggoner
  • Patent number: 10267784
    Abstract: A nanodevice includes a reservoir filled with conductive fluid and a membrane separating the reservoir. A nanopore is formed through the membrane having electrode layers separated by insulating layers. A certain electrode layer has a first type of organic coating and a pair of electrode layers has a second type. The first type of organic coating forms a motion control transient bond to a molecule in the nanopore for motion control, and the second type forms first and second transient bonds to different bonding sites of a base of the molecule. When a voltage is applied to the pair of electrode layers a tunneling current is generated by the base in the nanopore, and the tunneling current travels via the first and second transient bonds formed to be measured as a current signature for distinguishing the base. The motion control transient bond is stronger than first and second transient bonds.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: April 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Afzali-Ardakani, Stefan Harrer, Binquan Luan, Hongbo Peng, Stephen M. Rossnagel, Ajay K. Royyuru, Gustavo A. Stolovitzky, Philip S. Waggoner
  • Patent number: 9891189
    Abstract: Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Sebastian U. Engelmann, Stephen M. Rossnagel, Ying Zhang
  • Publication number: 20180005939
    Abstract: Techniques for improving reliability in Cu interconnects using Cu intermetallics are provided. In one aspect, a method of forming a Cu interconnect in a dielectric over a Cu line includes the steps of: forming at least one via in the dielectric over the Cu line; depositing a metal layer onto the dielectric and lining the via such that the metal layer is in contact with the Cu line at the bottom of the via, wherein the metal layer comprises at least one metal that can react with Cu to form a Cu intermetallic; annealing the metal layer and the Cu line under conditions sufficient to form a Cu intermetallic barrier at the bottom of the via; and plating Cu into the via to form the Cu interconnect, wherein the Cu interconnect is separated from the Cu line by the Cu intermetallic barrier. A device structure is also provided.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Inventors: Chao-Kun Hu, Christian Lavoie, Stephen M. Rossnagel, Thomas M. Shaw
  • Publication number: 20170370876
    Abstract: Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.
    Type: Application
    Filed: April 3, 2017
    Publication date: December 28, 2017
    Inventors: Sebastian U. Engelmann, Stephen M. Rossnagel, Ying Zhang
  • Patent number: 9853210
    Abstract: A method of making a magnetic random access memory (MRAM) device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer positioned in contact with the electrode, a free layer, and a tunnel barrier layer arranged between the reference layer and the free layer; and depositing an encapsulating layer on and along sidewalls of the MTJ by physical sputtering or ablation of a target material onto the MTJ.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: December 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Gen P. Lauer, Nathan P. Marchack, Stephen M. Rossnagel
  • Publication number: 20170141299
    Abstract: A method of making a magnetic random access memory (MRAM) device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer positioned in contact with the electrode, a free layer, and a tunnel barrier layer arranged between the reference layer and the free layer; and depositing an encapsulating layer on and along sidewalls of the MTJ by physical sputtering or ablation of a target material onto the MTJ.
    Type: Application
    Filed: November 17, 2015
    Publication date: May 18, 2017
    Inventors: Anthony J. Annunziata, Gen P. Lauer, Nathan P. Marchack, Stephen M. Rossnagel
  • Patent number: 9643179
    Abstract: Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: May 9, 2017
    Assignee: International Business Machines Corporation
    Inventors: Sebastian U. Engelmann, Stephen M. Rossnagel, Ying Zhang