Patents by Inventor Stephen W. Bedell

Stephen W. Bedell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10714303
    Abstract: Techniques for high throughput electron channeling contrast imaging (ECCI) by varying electron beam energy are provided. In one aspect, a method for ECCI of a crystalline wafer includes: placing the crystalline wafer under an electron microscope having an angle of less than 90° relative to a surface of the crystalline wafer; generating an electron beam, by the electron microscope, incident on the crystalline wafer; varying an accelerating voltage of the electron microscope to access a channeling condition of the crystalline wafer; and obtaining an image of the crystalline wafer. A system for ECCI is also provided.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: July 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Wacaser, Devendra K. Sadana, Stephen W. Bedell
  • Patent number: 10686090
    Abstract: A photovoltaic device and method for fabrication include multijunction cells, each cell having a material grown independently from the other and including different band gap energies. An interface is disposed between the cells and configured to wafer bond the cells wherein the cells are configured to be adjacent without regard to lattice mismatch.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: June 16, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Cheng-Wei Cheng, Jeehwan Kim, Devendra K. Sadana, Kuen-Ting Shiu, Norma E. Sosa Cortes
  • Patent number: 10672865
    Abstract: A method for forming a capacitive device comprises forming a first dielectric layer on a substrate. Portions of the first dielectric layer are removed to for form a cavity in the first dielectric layer. A first layer of conductive material is deposited on the first dielectric layer and conformally along sidewalls of the cavity. The method further includes depositing a second dielectric layer on the first layer of conductive material, and depositing a second layer of conductive material on the second dielectric layer to form a capacitive device.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Alexander Reznicek
  • Patent number: 10672929
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20200164222
    Abstract: Embodiments of the invention are directed to an integrated optogenetic device. The integrated optogenetic includes a substrate layer having a first substrate region and a second substrate region. The device further includes a first contact formed over the substrate layer in the first substrate region and a second contact layer formed over the substrate layer in the second region. In addition, the device includes a light-emitting diode (LED) structure communicatively coupled to the first contact layer and a biosensor element communicatively coupled to the second contact layer. The first contact layer is configured to operate as a bottom contact that provides electrical contact to the LED structure. The first contact layer is further configured to be substantially lattice matched with the substrate layer and a bottom layer of the LED structure.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Inventors: Steve Holmes, Stephen W. Bedell, Jia Chen, Hariklia Deligianni, Devendra K. Sadana
  • Publication number: 20200163696
    Abstract: An access system having a communication component that interfaces with a first device and a second device, where the first device is located inside or on an entity and coupled to a biological organism of the entity, and where the second device is located outside the entity and a controller component that controls a function of the first device, employing the communication component, to provide treatment to the biological organism of the entity coupled to the first device based on a request received from the second device.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Inventors: Steven J. Holmes, Bruce B. Doris, Devendra K. Sadana, Stephen W. Bedell, Jia Chen, Hariklia Deligianni
  • Patent number: 10658531
    Abstract: A photodiode fabricated using spalling techniques, and method for making the same. The photodiode including a substrate, an optical device semiconductor material layer disposed over the substrate, a p-type contact disposed over the optical device semiconductor material layer, an n-type contact disposed over the substrate, and an adhesion layer for rear illumination adhered to the bottom of the substrate. Both the substrate and the optical device semiconductor material layer comprise at least one of GaN, AlGaN or AlN.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: May 19, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, James R. Kozloski, Devendra K. Sadana
  • Publication number: 20200144439
    Abstract: An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 7, 2020
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Publication number: 20200141899
    Abstract: A method for making a hydrophobic biosensing device includes forming alternating layers over a top and sides of a fin on a dielectric layer to form a stack of layers. The stack of layers are planarized to expose the top of the fin. The fin and every other layer are removed to form a cathode group of fins and an anode group of fins. A hydrophobic surface on the two groups of fins.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 7, 2020
    Inventors: Ali Afzali-Ardakani, Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek
  • Patent number: 10644110
    Abstract: An n-doped field effect transistor (nFET) section of an integrated device logic region is provided. The nFET section includes a semiconductor substrate, a layer at least partially formed of silicon germanium (SiGe) disposed on the semiconductor substrate and fin formations. The fin formations are formed on the layer. Each fin formation includes a first fin portion that is at least partially formed of silicon (Si) and a second fin portion that is at least partially formed of hard mask material. The layer is etched to include free surfaces that facilitate elastic relaxation of SiGe therein and a corresponding application of tension in Si of the first fin portion of each of the fin formations.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Nicolas J. Loubet, Devendra K. Sadana
  • Patent number: 10644109
    Abstract: After forming semiconductor fins including vertically oriented alternating first digital alloy sublayer portions comprised of SiGe and second digital alloy sublayer portions comprised of Si on sidewalls of a sacrificial fin located on a substrate, the sacrificial fin is removed, leaving the semiconductor fins protruding from a top surface of the substrate. The SiGe and Si digital alloy sublayer portions are formed using isotopically enriched Si and Ge source gases to minimize isotopic mass variation in the SiGe and Si digital alloy sublayer portions.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: May 5, 2020
    Assignee: International Business Machines Corporation
    Inventors: Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek
  • Patent number: 10644184
    Abstract: A method of forming a photovoltaic device that includes ion implanting a first conductivity type dopant into first regions of a semiconductor layer of an SOI substrate, wherein the first regions are separated by a first pitch; and ion implanting a second conductivity type dopant into second regions of the semiconductor layer of the SOI substrate. The second regions are separated by a second pitch. Each second conductivity type implanted region of the second regions is in direct contact with first conductivity type implanted region of the first regions to provide a plurality of p-n junctions, and adjacent p-n junctions are separated by an intrinsic portion of the semiconductor layer to provide P-I-N cells that are horizontally oriented.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Patent number: 10636837
    Abstract: Magnetic regions of at least one of a chiplet or a receiving substrate are used to permit magnetically guided precision placement of a plurality of chiplets on the receiving substrate. In the present application, a solution containing dispersed chiplets is employed to facilitate the placement of the dispersed chiplets on bond pads that are present on a receiving substrate.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: April 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Ning Li, Frank R. Libsch, Devendra K. Sadana, Bing Dang
  • Publication number: 20200123677
    Abstract: A structure including a three-dimensionally stretchable single crystalline semiconductor membrane located on a substrate is provided. The structure is formed by providing a three-dimensional (3D) wavy silicon germanium alloy layer on a silicon handler substrate. A single crystalline semiconductor material membrane is then formed on a physically exposed surface of the 3D wavy silicon germanium alloy layer. A substrate is then formed on a physically exposed surface of the single crystalline semiconductor material membrane. The 3D wavy silicon germanium alloy layer and the silicon handler substrate are thereafter removed providing the structure.
    Type: Application
    Filed: December 18, 2019
    Publication date: April 23, 2020
    Inventors: Alexander Reznicek, Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Keith E. Fogel
  • Patent number: 10622636
    Abstract: High-capacity (i.e., a capacity of 50 mAh/gm or greater) and high-performance rechargeable batteries are provided that contain a rechargeable battery stack that includes a spalled material structure that includes a cathode material layer that is attached to a stressor material. The cathode material may include a single crystalline that is devoid of polymeric binders. The stressor material serves as a cathode current collector of the rechargeable battery stack.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yun Seog Lee, Stephen W. Bedell, Joel P. de Souza, Devendra K. Sadana
  • Patent number: 10601033
    Abstract: A high-capacity and a high-performance rechargeable battery is provided by forming a rechargeable battery stack that includes a spalled material structure that includes a spalled cathode material layer that has at least one textured surface and a stressor layer that has at least one textured surface. The stressor layer serves as a cathode current collector of the rechargeable battery stack. The at least one textured surface of the spalled cathode material layer forms a large interface area between the cathode and electrolyte which is formed above the spalled cathode material layer. The large interface area between the cathode and the electrolyte reduces interface resistance within the rechargeable battery stack.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: March 24, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yun Seog Lee, Stephen W. Bedell, Joel P. de Souza, Devendra K. Sadana
  • Publication number: 20200083398
    Abstract: A semiconductor device includes a substrate and a buffer layer disposed on a first portion, a second portion, and a third portion of the substrate. The semiconductor device further includes a multilayer light-emitting diode (LED) stack disposed on the first portion of the substrate, and an optical sensor disposed on the second portion of the substrate. The semiconductor device further includes at least one electrode disposed on the third portion of the substrate, a first conductor in contact with the multilayer LED stack, and a second conductor in contact with the optical sensor. The at least one electrode, the first conductor, and the second conductor are formed of a glassy carbon material.
    Type: Application
    Filed: November 13, 2019
    Publication date: March 12, 2020
    Applicant: International Business Machines Corporation
    Inventors: Steve Holmes, Devendra Sadana, Stephen W. Bedell, Bruce Doris, Hariklia Deligianni, Jia Chen
  • Patent number: 10585063
    Abstract: A method for making a hydrophobic biosensing device includes forming alternating layers over a top and sides of a fin on a dielectric layer to form a stack of layers. The stack of layers are planarized to expose the top of the fin. The fin and every other layer are removed to form a cathode group of fins and an anode group of fins. A hydrophobic surface on the two groups of fins.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek
  • Patent number: 10580925
    Abstract: An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Patent number: 10573625
    Abstract: A structure containing a vertical light emitting diode (LED) is provided. The vertical LED is present in an opening located in a display substrate, and the vertical LED is coupled to a back contact structure via a magnetic back contact structure. A first top contact structure contacts a topmost surface of the vertical LED and a second top contact structure contacts a surface of the back contact structure.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Bing Dang, Ning Li, Frank R. Libsch, Devendra K. Sadana