Patents by Inventor Steven Molesa

Steven Molesa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130081677
    Abstract: Dopant ink compositions and methods of fabricating solar cells there from are described. A dopant ink composition may include a cross-linkable matrix precursor, a bound dopant species, and a solvent. A method of fabricating a solar cell may include delivering a dopant ink composition to a region above a substrate. The dopant ink composition includes a cross-linkable matrix precursor, a bound dopant species, and a solvent. The method also includes baking the dopant ink composition to remove a substantial portion of the solvent of the dopant ink composition, curing the baked dopant ink composition to cross-link a substantial portion of the cross-linkable matrix precursor of the dopant ink composition, and driving dopants from the cured dopant ink composition toward the substrate.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Paul Loscutoff, Kahn Wu, Steven Molesa
  • Patent number: 8296943
    Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 30, 2012
    Assignee: Kovio, Inc.
    Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
  • Patent number: 8191018
    Abstract: Methods and software for correcting printable circuit layouts. The methods generally including steps of identifying shapes in an input circuit layout, applying a plurality of correction rules to the shapes, and producing an output printed circuit layout in accordance with the identified shapes and the correction rules. The input circuit layout generally comprises a bitmapped image or other description of at least one printable layer of at least one electronic component, device, or die. Embodiments of the present invention further allow for more precise control of spreading and effective coverage of features (e.g., source/drain terminal regions, gates, capacitors, diodes, interconnects, etc.) on a substrate by a printed ink composition including electronic materials.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: May 29, 2012
    Assignee: Kovio, Inc.
    Inventors: Steven Molesa, Erik Scher, Patrick Smith, Michael Kocsis
  • Publication number: 20100123582
    Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
    Type: Application
    Filed: May 15, 2009
    Publication date: May 20, 2010
    Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
  • Publication number: 20090085095
    Abstract: The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 2, 2009
    Inventors: Arvind KAMATH, Erik SCHER, Patrick SMITH, Aditi CHANDRA, Steven MOLESA
  • Publication number: 20090065776
    Abstract: Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.
    Type: Application
    Filed: May 2, 2008
    Publication date: March 12, 2009
    Inventors: Erik SCHER, Steven Molesa, Joerg Rockenberger, Arvind Kamath, Ikuo Mori