Patents by Inventor Su-Horng Lin
Su-Horng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240087935Abstract: A closed gas circulation system may include a sealed plenum, circulation fans, and a fan filter unit (FFU) inlet to contain, filter, condition, and re-circulate a gas through a chamber of an interface tool. The gas provided to the chamber is maintained in a conditioned environment in the closed gas circulation system as opposed to introducing external air into the chamber through the FFU inlet. This enables precise control over the relative humidity and oxygen concentration of the gas used in the chamber, which reduces the oxidation of semiconductor wafers that are transferred through the chamber. The closed gas circulation system may also include an air-flow rectifier, a return vent, and one or more vacuum pumps to form a downflow of collimated gas in the chamber and to automatically control the feed-forward pressure and flow of gas through the chamber and the sealed plenum.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Inventors: Jyh-Shiou HSU, Chyi-Tsong NI, Mu-Tsang LIN, Su-Horng LIN
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Patent number: 11854851Abstract: A closed gas circulation system may include a sealed plenum, circulation fans, and a fan filter unit (FFU) inlet to contain, filter, condition, and re-circulate a gas through a chamber of an interface tool. The gas provided to the chamber is maintained in a conditioned environment in the closed gas circulation system as opposed to introducing external air into the chamber through the FFU inlet. This enables precise control over the relative humidity and oxygen concentration of the gas used in the chamber, which reduces the oxidation of semiconductor wafers that are transferred through the chamber. The closed gas circulation system may also include an air-flow rectifier, a return vent, and one or more vacuum pumps to form a downflow of collimated gas in the chamber and to automatically control the feed-forward pressure and flow of gas through the chamber and the sealed plenum.Type: GrantFiled: March 5, 2021Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jyh-Shiou Hsu, Chyi-Tsong Ni, Mu-Tsang Lin, Su-Horng Lin
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Publication number: 20230253268Abstract: A method includes placing a wafer on a rotation mechanism of a metrology device; illuminating, by using a light source of the metrology device, the wafer by an X-ray; rotating, by using the rotation mechanism, the wafer while illuminating the wafer by the X-ray; detecting, by using an image sensor of the metrology device, a transmission portion of the X-ray passing through the wafer while rotating the wafer; and obtaining, by using a processor of the metrology device, a top width and a bottom width of a structure over the wafer based on the transmission portion of the X-ray with different rotating angles of the rotation mechanism.Type: ApplicationFiled: April 21, 2023Publication date: August 10, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Su-Horng LIN, Chi-Ming YANG
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Patent number: 11652007Abstract: A method includes illuminating a wafer by an X-ray, detecting a spatial domain pattern produced when illuminating the wafer by the X-ray, identifying at least one peak from the detected spatial domain pattern, and analyzing the at least one peak to obtain a morphology of a transistor structure of the wafer.Type: GrantFiled: October 28, 2019Date of Patent: May 16, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Su-Horng Lin, Chi-Ming Yang
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Publication number: 20220349056Abstract: Embodiments of mechanisms for processing a semiconductor wafer are provided. A method for processing a wafer includes providing a wafer process apparatus. The wafer process apparatus includes a chamber and a stage positioned in the chamber for supporting the semiconductor wafer. The method also includes supplying a process gas to the semiconductor wafer via a discharged assembly that is adjacent to the stage. The discharged assembly includes a discharged passage configured without a vertical flow path section.Type: ApplicationFiled: July 21, 2022Publication date: November 3, 2022Inventor: Su-Horng LIN
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Patent number: 11443959Abstract: A system includes a chamber, an inlet valve, a control device, and a recycle pipe. The chamber is configured to perform a semiconductor process and including an output port. The inlet valve is coupled to the chamber and a supply pipe. The controller is coupled to the inlet valve and the chamber. The recycle pipe arranged outside the chamber and coupled to the chamber. The recycle pipe is independent from the supply pipe. The controller is configured to determine whether the chamber is idle, and is configured to control the inlet valve based on the determination of whether the chamber is idle. When the controller closes the output port of the chamber and opens the inlet valve, water from the supply pipe flows into a wall of the chamber through the inlet valve first and then flows into the recycle pipe.Type: GrantFiled: September 21, 2020Date of Patent: September 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Su-Horng Lin
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Publication number: 20220285192Abstract: A closed gas circulation system may include a sealed plenum, circulation fans, and a fan filter unit (FFU) inlet to contain, filter, condition, and re-circulate a gas through a chamber of an interface tool. The gas provided to the chamber is maintained in a conditioned environment in the closed gas circulation system as opposed to introducing external air into the chamber through the FFU inlet. This enables precise control over the relative humidity and oxygen concentration of the gas used in the chamber, which reduces the oxidation of semiconductor wafers that are transferred through the chamber. The closed gas circulation system may also include an air-flow rectifier, a return vent, and one or more vacuum pumps to form a downflow of collimated gas in the chamber and to automatically control the feed-forward pressure and flow of gas through the chamber and the sealed plenum.Type: ApplicationFiled: March 5, 2021Publication date: September 8, 2022Inventors: Jyh-Shiou Hsu, Chyi-Tsong Ni, Mu-Tsang Lin, Su-Horng Lin
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Patent number: 11414759Abstract: Embodiments of mechanisms for processing a semiconductor wafer are provided. A method for processing a wafer includes providing a wafer process apparatus. The wafer process apparatus includes a chamber and a stage positioned in the chamber for supporting the semiconductor wafer. The method also includes supplying a process gas to the semiconductor wafer via a discharging assembly that is adjacent to the stage. The discharging assembly includes a discharging passage configured without a vertical flow path section.Type: GrantFiled: November 29, 2013Date of Patent: August 16, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventor: Su-Horng Lin
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Patent number: 11127629Abstract: A method of fabricating a semiconductor device includes: forming a trench on an insulating layer to expose a first conductive feature disposed under the insulating layer; forming a barrier layer over the insulating layer, a sidewall of the trench, and the first conductive feature; etching a bottom of the barrier layer to expose the first conductive feature; and forming a second conductive feature over an exposed portion of the first conductive feature.Type: GrantFiled: May 17, 2016Date of Patent: September 21, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventor: Su-Horng Lin
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Publication number: 20210005467Abstract: A system includes a chamber, an inlet valve, a control device, and a recycle pipe. The chamber is configured to perform a semiconductor process and including an output port. The inlet valve is coupled to the chamber and a supply pipe. The controller is coupled to the inlet valve and the chamber. The recycle pipe arranged outside the chamber and coupled to the chamber. The recycle pipe is independent from the supply pipe. The controller is configured to determine whether the chamber is idle, and is configured to control the inlet valve based on the determination of whether the chamber is idle. When the controller closes the output port of the chamber and opens the inlet valve, water from the supply pipe flows into a wall of the chamber through the inlet vale first and then flows into the recycle pipe.Type: ApplicationFiled: September 21, 2020Publication date: January 7, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Su-Horng LIN
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Patent number: 10867812Abstract: A system includes a chamber, an inlet valve, and a control device. The chamber is configured to perform a semiconductor process. The inlet valve is coupled to the chamber and a facility water source. The control device is coupled to the inlet valve, and configured to at least partially close the inlet valve when the chamber is idle.Type: GrantFiled: August 30, 2017Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Su-Horng Lin
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Patent number: 10755953Abstract: The present disclosure relates to some embodiments of a method for improving processing efficiency of a cluster tool. The method comprises transferring a first lot of wafers from a transfer load lock to a designated storage load lock and transferring a second lot of wafers from the transfer load lock to the designated storage load lock while the first lot of wafers is in the transfer load lock or the designated storage load lock. The designated storage load lock has the same structure as the transfer load lock and respectively has an inner load lock portal at an interface with the first transfer chamber and an outer load lock portal on a sidewall of a front end interface. The inner load lock portal of the designated storage load lock is retained opened during processing. The outer load lock portal of the designated storage load lock is retained closed during processing.Type: GrantFiled: October 18, 2019Date of Patent: August 25, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Su-Horng Lin, Tsung-Hsun Yu, Victor Y. Lu
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Publication number: 20200066606Abstract: A method includes illuminating a wafer by an X-ray, detecting a spatial domain pattern produced when illuminating the wafer by the X-ray, identifying at least one peak from the detected spatial domain pattern, and analyzing the at least one peak to obtain a morphology of a transistor structure of the wafer.Type: ApplicationFiled: October 28, 2019Publication date: February 27, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Su-Horng LIN, Chi-Ming YANG
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Publication number: 20200051837Abstract: The present disclosure relates to some embodiments of a method for improving processing efficiency of a cluster tool. The method comprises transferring a first lot of wafers from a transfer load lock to a designated storage load lock and transferring a second lot of wafers from the transfer load lock to the designated storage load lock while the first lot of wafers is in the transfer load lock or the designated storage load lock. The designated storage load lock has the same structure as the transfer load lock and respectively has an inner load lock portal at an interface with the first transfer chamber and an outer load lock portal on a sidewall of a front end interface. The inner load lock portal of the designated storage load lock is retained opened during processing. The outer load lock portal of the designated storage load lock is retained closed during processing.Type: ApplicationFiled: October 18, 2019Publication date: February 13, 2020Inventors: Su-Horng Lin, Tsung-Hsun Yu, Victor Y. Lu
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Patent number: 10510566Abstract: Some embodiments relate to a cluster tool for semiconductor manufacturing. The cluster tool comprises a first transfer chamber having a first transfer robot. The cluster tool further comprises a designated storage chamber and a transfer load lock attached to the first transfer chamber. The cluster tool further comprises a second transfer chamber connected to the first transfer chamber through a pair of via connector chambers, the second transfer chamber having a second transfer robot. The cluster tool further comprises at least three epitaxial deposition chamber attached to the second transfer chamber. The cluster tool further comprises a control unit configured to control the second transfer robot to transfer wafers between the designated storage chamber and the transfer load lock.Type: GrantFiled: July 14, 2015Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Su-Horng Lin, Tsung-Hsun Yu, Victor Y. Lu
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Patent number: 10460999Abstract: A metrology device includes a light source and an image sensor. The light source is configured for providing an X-ray illuminating a wafer. The image sensor is configured for detecting a spatial domain pattern produced when the X-ray illuminating the wafer.Type: GrantFiled: November 27, 2013Date of Patent: October 29, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Su-Horng Lin, Chi-Ming Yang
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Publication number: 20190067042Abstract: A system includes a chamber, an inlet valve, and a control device. The chamber is configured to perform a semiconductor process. The inlet valve is coupled to the chamber and a facility water source. The control device is coupled to the inlet valve, and configured to at least partially close the inlet valve when the chamber is idle.Type: ApplicationFiled: August 30, 2017Publication date: February 28, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Su-Horng LIN
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Patent number: 10121653Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to form a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.Type: GrantFiled: September 22, 2015Date of Patent: November 6, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
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Patent number: 10002780Abstract: A method of manufacturing a semiconductor structure includes providing a substrate, disposing a first semiconductive material over the substrate at a first temperature, disposing a second semiconductive material over the first semiconductive material at a second temperature, and disposing a third semiconductive material over the second semiconductive material at a third temperature, wherein a first interval between the first temperature and the second temperature is substantially same as a second interval between the second temperature and the third temperature.Type: GrantFiled: May 17, 2016Date of Patent: June 19, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Su-Horng Lin, Victor Y. Lu, Tsung-Hsi Yang
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Publication number: 20170338149Abstract: A method of fabricating a semiconductor device includes: forming a trench on an insulating layer to expose a first conductive feature disposed under the insulating layer; forming a barrier layer over the insulating layer, a sidewall of the trench, and the first conductive feature; etching a bottom of the barrier layer to expose the first conductive feature; and forming a second conductive feature over an exposed portion of the first conductive feature.Type: ApplicationFiled: May 17, 2016Publication date: November 23, 2017Inventor: SU-HORNG LIN