Abstract: Techniques and apparatus for driving transistor gates of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a switching converter having a switching transistor and a gate driver having an output coupled to a gate of the switching transistor. The gate driver includes a first switching device coupled between the output of the gate driver and a first voltage rail; a second switching device coupled between the output of the gate driver and a voltage node of the gate driver; a third switching device coupled between the voltage node of the gate driver and a second voltage rail; and a voltage clamp coupled in series with a fourth switching device, the voltage clamp and the fourth switching device being coupled between a third voltage rail and the voltage node (or the output of the gate driver).

Abstract: Certain aspects are directed to a circuit for brightness control. The circuit generally includes: a duty cycle adjustment circuit configured to receive a first backlight control signal having a first duty cycle and generate a second backlight control signal having a second duty cycle, the second duty cycle being greater than the first duty cycle if the first duty cycle is less than a threshold; a digital processor configured to set a value of a software brightness code based on the second duty cycle; and a backlight control circuit configured to drive a backlight in accordance with the software brightness code and the second duty cycle of the second backlight control signal.

Abstract: Techniques and apparatus for driving transistor gates of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a switching converter having a switching transistor and a gate driver having an output coupled to a gate of the switching transistor. The gate driver includes a first switching device coupled between the output of the gate driver and a first voltage rail; a second switching device coupled between the output of the gate driver and a voltage node of the gate driver; a third switching device coupled between the voltage node of the gate driver and a second voltage rail; and a voltage clamp coupled in series with a fourth switching device, the voltage clamp and the fourth switching device being coupled between a third voltage rail and the voltage node (or the output of the gate driver).

Abstract: Certain aspects are directed to a circuit for brightness control. The circuit generally includes: a duty cycle adjustment circuit configured to receive a first backlight control signal having a first duty cycle and generate a second backlight control signal having a second duty cycle, the second duty cycle being greater than the first duty cycle if the first duty cycle is less than a threshold; a digital processor configured to set a value of a software brightness code based on the second duty cycle; and a backlight control circuit configured to drive a backlight in accordance with the software brightness code and the second duty cycle of the second backlight control signal.

Abstract: Methods and apparatuses can implement voltage regulation with frequency control. In an example aspect, a voltage generator includes an output node and a switch. A voltage controller is coupled to the switch of the voltage generator. A mode controller is coupled to the voltage controller. The voltage controller is configured to control an output voltage at the output node by closing and opening the switch at a switching frequency. The voltage controller is configured to operate in multiple operational modes. The mode controller is configured to cause the voltage controller to shift between two or more operational modes responsive to the switching frequency. The switching frequency can be moved out of a rejection frequency band by shifting operational modes. Shifting can include, for example, shifting from a PFM mode to a PWM mode or shifting from one hysteresis mode to another hysteresis mode within the PFM mode.

Abstract: A duty cycle estimation circuit includes a latch circuit that receives a clock signal for a voltage regulator. The latch circuit outputs a duty cycle estimate. The duty cycle estimation circuit also includes a low pass filter coupled to an output of the latch circuit to receive the duty cycle estimate. The duty cycle estimation circuit further includes a comparator that receives, as input, an output of the low pass filter and a voltage regulator output. The comparator feeds back a feedback signal to the latch circuit.

Abstract: Disclosed is switching power supply that includes a pulse frequency modulation (PFM) mode of operation current feedback control. A reference current source is configured to output a reference current at one of several selectable levels. The level of the reference current may vary during operation of the current feedback control loop.

Abstract: A duty cycle estimation circuit includes a latch circuit that receives a clock signal for a voltage regulator. The latch circuit outputs a duty cycle estimate. The duty cycle estimation circuit also includes a low pass filter coupled to an output of the latch circuit to receive the duty cycle estimate. The duty cycle estimation circuit further includes a comparator that receives, as input, an output of the low pass filter and a voltage regulator output. The comparator feeds back a feedback signal to the latch circuit.

Abstract: Disclosed is switching power supply that includes a pulse frequency modulation (PFM) mode of operation current feedback control. A reference current source is configured to output a reference current at one of several selectable levels. The level of the reference current may vary during operation of the current feedback control loop.

Abstract: A hysteresis generator provides a hysteresis parameter V_hyst to a hysteresis comparator of a voltage regulator. The hysteresis parameter V_hyst is a function of circuit components of the hysteresis generator, a voltage output Vout of the regulator, a voltage input Vin of the regulator, and a signal that drives one of a plurality of switches of the regulator. A switch driver drives the switches based on the hysteresis parameter. One or more of the circuit components of the hysteresis generator that provide the hysteresis parameter also define a hysteresis time period T_hyst. The hysteresis time period T_hyst defines in combination with a delay time period T_Td of the regulator, a switching time period T for the regulator that is substantially constant.

Abstract: A hysteresis generator provides a hysteresis parameter V_hyst to a hysteresis comparator of a voltage regulator. The hysteresis parameter V_hyst is a function of circuit components of the hysteresis generator, a voltage output Vout of the regulator, a voltage input Vin of the regulator, and a signal that drives one of a plurality of switches of the regulator. A switch driver drives the switches based on the hysteresis parameter. One or more of the circuit components of the hysteresis generator that provide the hysteresis parameter also define a hysteresis time period T_hyst. The hysteresis time period T_hyst defines in combination with a delay time period T_Td of the regulator, a switching time period T for the regulator that is substantially constant.

Abstract: A method and apparatus for determining the entry and exit from a pulse skipping mode in a power supply is provided. The power supply may incorporate a buck regulator. The method begins when current is sensed at an inductor of a power supply. This sensed current is then compared with a predetermined threshold current value. If the comparison reveals that the current is below the predetermined threshold current value, a pulse skipping mode is entered. If the current is found to be above the predetermined threshold the pulse skipping mode is not entered and normal operation continues. The apparatus includes a transconductance amplifier, an offset voltage source, a reference power supply reference voltage source, first and second voltage comparators, and a processor.

Abstract: A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Abstract: A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Abstract: A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Abstract: A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Abstract: A converter comprising a comparator having a first input operable to receive a first signal, a second input operable to receive a second signal, and an output, a switch for sinking a portion of the first signal, wherein the switch is responsive to the output, and an integrator connected to the first input, wherein the first signal is a voltage developed by the integrator when a current proportional to the absolute temperature is applied thereto. A method for measuring temperature of a device using a comparator and converting the bitstream of the comparator to a digital output is also given. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Abstract: A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.

Abstract: A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.

Abstract: A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.