Patents by Inventor Suguru SAITO

Suguru SAITO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10991745
    Abstract: A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: April 27, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Suguru Saito, Nobutoshi Fujii, Ryosuke Matsumoto, Yoshifumi Zaizen, Shuji Manda, Shunsuke Maruyama, Hideo Shimizu
  • Publication number: 20210043672
    Abstract: Provided is an imaging unit more efficiently manufacturable with high dimensional precision. The imaging unit includes: a sensor board including an imaging device, in which the imaging device has a plurality of pixels and allows generation of a pixel signal by receiving outside light in each of the plurality of pixels; a bonding layer including an inorganic insulating material; and a circuit board including a circuit chip and an organic insulating layer, in which a circuit chip has a signal processing circuit that performs signal processing for the pixel signal and is bonded to the sensor board through the bonding layer, and the organic insulating layer covers a vicinity of the circuit chip.
    Type: Application
    Filed: March 5, 2019
    Publication date: February 11, 2021
    Inventors: KENYA NISHIO, SUGURU SAITO
  • Publication number: 20200365639
    Abstract: A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Applicant: Sony Corporation
    Inventors: Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Masanori IWASAKI, Toshihiko HAYASHI, Shuzo SATO, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20200350198
    Abstract: The present technology relates to a semiconductor device in which an air gap structure can be formed in any desired region regardless of the layout of metallic wiring lines, a method for manufacturing the semiconductor device, and an electronic apparatus. A first wiring layer and a second wiring layer including a metallic film are stacked via a diffusion preventing film that prevents diffusion of the metallic film. The diffusion preventing film is formed by burying a second film in a large number of holes formed in a first film. At least the first wiring layer includes the metallic film, an air gap, and a protective film formed with the second film on the inner peripheral surface of the air gap, and the opening width of the air gap is equal to the opening width of the holes formed in the first film or is greater than the opening width of the holes. For example, the present technology can be applied to a semiconductor device in which wiring layers are stacked, and the like.
    Type: Application
    Filed: December 28, 2018
    Publication date: November 5, 2020
    Inventors: SUGURU SAITO, NOBUTOSHI FUJII, MASAKI HANEDA, KAZUNORI NAGAHATA
  • Patent number: 10818717
    Abstract: A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: October 27, 2020
    Assignee: Sony Corporation
    Inventors: Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Masanori Iwasaki, Toshihiko Hayashi, Shuzo Sato, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Publication number: 20200321386
    Abstract: A first light receiving element according to an embodiment of the present disclosure includes a plurality of pixels, a photoelectric converter that is provided as a layer common to the plurality of pixels, and contains a compound semiconductor material, and a first electrode layer that is provided between the plurality of pixels on light incident surface side of the photoelectric converter, and has a light-shielding property.
    Type: Application
    Filed: December 12, 2018
    Publication date: October 8, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shuji MANDA, Ryosuke MATSUMOTO, Suguru SAITO, Shigehiro IKEHARA, Tetsuji YAMAGUCHI, Shunsuke MARUYAMA
  • Publication number: 20200258924
    Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
    Type: Application
    Filed: October 16, 2018
    Publication date: August 13, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
  • Patent number: 10712543
    Abstract: A positional shift of a lens of a stacked lens structure is reduced. A plurality of through-holes is formed at a position shifted from a first target position on a substrate according to a first shift. A lens is formed on an inner side of each of the through-holes using a first mold in which a plurality of first transfer surfaces is disposed at a position shifted from a predetermined second target position according to a second shift and a second mold in which a plurality of second transfer surfaces is disposed at a position shifted from a predetermined third target position according to a third shift. The plurality of substrates having the lenses formed therein is formed according to direct bonding, and the plurality of stacked substrates is divided. The present technique can be applied to a stacked lens structure or the like, for example.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: July 14, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kunihiko Hikichi, Koichi Takeuchi, Toshihiro Kurobe, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Patent number: 10690814
    Abstract: Influence of chipping in case of dicing a plurality of stacked substrates is reduced. Provided is a semiconductor device where a substrate, in which a groove surrounding a pattern configured with a predetermined circuit or part is formed, is stacked. The present technology can be applied to, for example, a stacked lens structure where through-holes are formed in each substrate and lenses are disposed in inner sides of the through-holes, a camera module where a stacked lens structure and a light-receiving device are incorporated, a solid-state imaging device where a pixel substrate and a control substrate are stacked, and the like.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: June 23, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshiaki Shiraiwa, Masaki Okamoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Minoru Ishida
  • Publication number: 20200127039
    Abstract: There is provided a light-receiving device including: a plurality of photoelectric conversion layers including a first photoelectric conversion layer and a second photoelectric conversion layer disposed in respective regions that are different in a planar view; an insulating film that separates the plurality of photoelectric conversion layers from one another; a first inorganic semiconductor material included in the first photoelectric conversion layer; and a second inorganic semiconductor material included in the second photoelectric conversion layer, and different from the first inorganic semiconductor material.
    Type: Application
    Filed: December 19, 2017
    Publication date: April 23, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Suguru SAITO, Nobutoshi FUJII
  • Patent number: 10627549
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked based on an alignment mark. The alignment mark is formed simultaneously with the through-hole. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: April 21, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Atsushi Yamamoto, Koichi Takeuchi, Toshihiro Kurobe, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Publication number: 20200049959
    Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.
    Type: Application
    Filed: July 10, 2019
    Publication date: February 13, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke MORIYA, Masanori IWASAKI, Takashi OINOUE, Yoshiya HAGIMOTO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20200035739
    Abstract: A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.
    Type: Application
    Filed: April 16, 2018
    Publication date: January 30, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Suguru SAITO, Nobutoshi FUJII, Ryosuke MATSUMOTO, Yoshifumi ZAIZEN, Shuji MANDA, Shunsuke MARUYAMA, Hideo SHIMIZU
  • Patent number: 10534162
    Abstract: Substrates with lenses having lenses disposed therein are aligned with high accuracy. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are direct-bonded and stacked. In particular, one or more air grooves formed in surfaces of the substrates reduces an influence of air inside a void portion between adjacent lenses of a layered lens structure.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: January 14, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hirotaka Yoshioka, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Publication number: 20200006415
    Abstract: A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Application
    Filed: September 9, 2019
    Publication date: January 2, 2020
    Applicant: Sony Corporation
    Inventors: Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Masanori IWASAKI, Toshihiko HAYASHI, Shuzo SATO, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
  • Publication number: 20190378870
    Abstract: The present technology relates to an imaging device, an electronic apparatus, and a method of manufacturing an imaging device capable of thinning a semiconductor on a terminal extraction surface while maintaining a strength of a semiconductor chip. There is provided an imaging device including: a first substrate having a pixel region in which pixels are two-dimensionally arranged, the pixels performing photoelectric conversion of light; and a second substrate in which a through silicon via is formed, in which a dug portion is formed in a back surface of the second substrate opposite to an incident side of light of the second substrate, and a redistribution layer (RDL) connected to a back surface of the first substrate is formed in the dug portion. The present technology can be applied to, for example, a semiconductor package including a semiconductor chip.
    Type: Application
    Filed: February 8, 2018
    Publication date: December 12, 2019
    Inventors: SUGURU SAITO, NOBUTOSHI FUJII
  • Publication number: 20190369355
    Abstract: There is provided a camera module including a stacked lens structure including a plurality of lens substrates. The plurality of lens substrates includes a first lens substrate including a first lens that is disposed at an inner side of a through-hole formed in the first lens substrate, and a second lens substrate including a second lens that is disposed at an inner side of a through-hole formed in the second lens substrate, wherein the first lens substrate is directly bonded to the second lens substrate. The camera module further includes an electromagnetic drive unit configured to adjust a distance between the stacked lens structure and a light-receiving element.
    Type: Application
    Filed: January 16, 2018
    Publication date: December 5, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Munekatsu FUKUYAMA, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Masanori IWASAKI, Toshihiko HAYASHI, Shuzo SATO, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Yusuke MORIYA, Minoru ISHIDA
  • Patent number: 10431618
    Abstract: A deformation of a stacked lens is suppressed. A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: October 1, 2019
    Assignee: Sony Corporation
    Inventors: Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Masanori Iwasaki, Toshihiko Hayashi, Shuzo Sato, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Patent number: 10379323
    Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: August 13, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Moriya, Masanori Iwasaki, Takashi Oinoue, Yoshiya Hagimoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
  • Patent number: 10192924
    Abstract: An image pickup device according to the present disclosure includes a first pixel and a second pixel each including a photodetection section and a light condensing section, the photodetection section including a photoelectric conversion element, the light condensing section condensing incident light toward the photodetection section, the first pixel and the second pixel being adjacent to each other and each having a step part on a photodetection surface of the photodetection section, in which at least a part of a wall surface of the step part is covered with a first light shielding section.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: January 29, 2019
    Assignee: Sony Corporation
    Inventors: Takeshi Yanagita, Suguru Saito, Kaoru Koike