Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A thin film transistor array panel including a substrate, a plurality of first signal lines formed on the substrate, a plurality of second signal lines, insulated from the first signal lines, which are formed on the substrate and which define an area of a display area by traversing the first signal lines, a driver disposed on a peripheral area, a plurality of connection lines, disposed on the peripheral area, which couple the driver to each of the first signal lines, and an insulating layer which insulate the first signal lines from the connection lines. The insulating layer includes a plurality of contact holes, portions of the first signal lines and the connection lines are connected through the contact holes, and sizes of exposed portions of the first signal lines exposed through the contact holes increase as respective distances from the contact holes to the driver increase.

Abstract: A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.

Abstract: A TFT array panel and a manufacturing method thereof, The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: A display substrate includes a substrate including a pixel area, a plurality of gate lines formed on the substrate, a plurality of data lines intersecting the plurality of gate lines, a storage capacitor formed adjacent the plurality of gate lines and the plurality of data lines to surround the pixel area, and a pixel electrode formed in the pixel area, the pixel electrode connected to the storage capacitor.

Abstract: A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.

Abstract: A refrigerant distributor is disclosed, for minimizing noise and providing refrigerant to each refrigerant tube uniformly, which includes a hollow body (11) in which a refrigerant flows; an inlet (12) provided at one end of the body, and through which the refrigerant flows in; and a plurality of discharge holes (13) provided for being in parallel at the other end of the body.

Abstract: Methods, machines, and machine-readable media for processing multiple exposure source images, including a reference image and one or more non-reference images, are described. In one aspect, respective sets of motion vectors that establish correspondences between respective pairs of the source images are calculated. Ones of the source images are warped to a reference coordinate system based on the sets of motion vectors. For each of the non-reference ones of the warped images, a respective set of one or more measures of alignment confidence between the non-reference warped image and the reference image in the reference coordinate system is computed. Saturated pixels and unsaturated pixels are identified in the warped images. An output image with pixel value contributions from unsaturated pixels in the warped images is generated based on the computed alignment confidence measures.

Abstract: An array substrate includes a base substrate, a dummy circuit section, a dummy pixel portion, an extended line, a common voltage line, and an overlap portion. Pixel portions are formed in a display area. The dummy circuit section is formed in a peripheral area to protect the pixel portions from static electricity. The dummy pixel portion is adjacent to the dummy circuit section. The dummy circuit section is in an electrically floating state. The extended line is extended from the dummy circuit section and electrically open with respect to the dummy pixel portion. The common voltage line is overlapped with the extended line of the dummy circuit section, the extended line being electrically open with respect to the display area, and thus the display area may be protected from the static electricity which flows into the dummy circuit section.

Abstract: A display panel includes a plurality of source wirings, gate wirings, pixel areas and pixel electrodes. The source wirings are extended in a first direction, and the gate wirings are extended in a second direction crossing the first direction. The pixel areas are defined by the source wirings and the gate wirings. Each of the pixel electrodes is formed in each of the pixel areas and includes a first reflection electrode and a second reflection electrode formed at both ends of the pixel areas and defining a first reflection area and a second reflection area, and a transparent electrode formed between the first and second reflection electrodes and defining a transmission area. The pixel area is arranged in the first reflection area, the transmission area and the second reflection area. The aperture ratio is not decreased because light does not leak at the boundary between the transmission and reflection area.

Abstract: A TFT array panel for a display has a gate insulating layer with substantially the same dielectric constant as the passivation layer and may be thicker than the passivation layer, while the storage capacitor includes a pixel electrode and a storage electrode overlapping each other along with the passivation layer sandwiched therebetween such that the storage capacitor has a higher capacitance than known storage capacitors even though the storage conductors have the same area as before.

Abstract: A method, apparatus, and system are disclosed for selecting quality images from multiple captured images. One embodiment is an image capturing system. The system includes hardware for capturing a plurality of consecutive images and a processor for determining a quality indication for the consecutive images and for selecting one of the consecutive images based on the quality indication.

Abstract: Peteye is the appearance of an unnatural coloration (not necessarily red) of the pupils in an animal appearing in an image captured by a camera with flash illumination. Systems and methods of detecting and correcting peteye are described. In one aspect a classification map segmenting pixels in the input image into peteye pixels and non-peteye pixels is generated based on a respective segmentation condition on values of the pixels. Candidate peteye pixel areas are identified in the classification map. The generating and the identifying processes are repeated with the respective condition replaced by a different respective segmentation condition on the pixel values.

Abstract: A mobile communications terminal, and method and system for controlling a floor during a PT session, are discussed. According to one aspect of the present invention, the terminal includes a PT client. The PT client includes a controller to request a user's confirmation of media burst for a PT session when the PT client receives a media burst confirmation request. The controller selectively starts encoding of media data of the PT session depending on the user's response to the controller's request.

Abstract: Representations of an input signal at different lower resolutions are obtained, where n denotes a level of resolution, and where 0?n?N. Level n=N corresponds to the representation having the lowest resolution, and level n=0 corresponds to the input signal. The resolution increases as level n decreases. The nth level representation is used to estimate and remove low frequency error in the n?1th level representation. Then application-specific processing is performed on the n?1th level representation.

Abstract: Processing of a digital image includes applying a function to a plurality of pixels in the image, the function relating a noise statistic to pixel intensity values. By applying the noise statistic function, a noise statistic value is produced for each of the pixels. Each of the pixels is processed with respect to its noise statistic value.

Abstract: A method and system for deblurring an image based on motion tracking. Light is recorded at an image sensor of an imaging device to capture an image. Motion of said image sensor is recorded at a motion sensor of the imaging device during the recording of the light at the image sensor. A blur kernel is generated based on the motion.

Abstract: Denoising of a plurality of pixels of a color digital image includes analyzing the plurality of pixels to identify those pixels having a high likelihood of containing significant noise; and forcing those pixels having a high likelihood of containing significant noise to be photometrically coherent with nearby pixels having a lower likelihood of containing significant noise.

Abstract: A method for deblurring an image. A first image is captured. A second image is captured, wherein the second image is more blurred and more exposed than the first image. The second image is deblurred based on the first image.