Patents by Inventor Sumanesh Samanta

Sumanesh Samanta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150347310
    Abstract: A cache controller coupled to a cache store supported by a solid-state memory element uses a metadata update process that reduces write amplification caused by writing both cache data and metadata to the solid-state memory element. The cache controller partitions the solid-state memory element to include a metadata portion, a host data or cache portion and a log portion. Host write requests that include “hot” data are processed and recorded by the cache controller. The cache controller maintains first and second maps. A log thread combines multiple metadata updates in a single log entry block. Pending metadata updates are checked to determine when a commit threshold is reached. Thereafter, the pending metadata updates are written to the solid-state memory element and the maps are updated.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: LSI Corporation
    Inventors: Mark Ish, Sumanesh Samanta, Horia Simionescu, Saugata Das Purkayastha
  • Publication number: 20150324300
    Abstract: A storage subsystem can achieve more efficient I/O processing by enabling users to specify and pass out of band I/O hints comprising an object to be hinted, a hint type, and caching strategies associated with a hint type. A hinted object may be either a virtual device or a file. In addition to priority cache, hint types may include never-cache, sticky-cache, and volatile-cache. Hints may be passed via command-line or graphical-user interfaces.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 12, 2015
    Applicant: LSI CORPORATION
    Inventors: Kishore Kaniyar Sampathkumar, Parag Maharana, Sumanesh Samanta, Saugata Das Purkayastha
  • Publication number: 20150317090
    Abstract: A system and method for managing the life expectancy of at least one solid state drive (SSD) within a cache device of a storage subsystem includes determining a baseline rate of decline for each SSD based on its guaranteed life expectancy. At intervals, each SSD of the cache device is polled for remaining life and power-on time, and a current rate of decline (based on time since initialization) and a cumulative rate of decline (based on total lifespan of the SSD) is determined. When both the current rate of decline and the cumulative rate of decline exceed the baseline rate of decline for any SSD of the cache device, write requests to that SSD are blocked and redirected to the virtual device until either the current rate of decline or cumulative rate of decline drop below the baseline rate.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 5, 2015
    Applicant: LSI Corporation
    Inventors: Sumanesh Samanta, Mohana Rao Goli, Karimulla Sheik
  • Patent number: 9058274
    Abstract: The disclosure is directed to a system and method for managing READ cache memory of at least one node of a multiple-node storage cluster. According to various embodiments, a cache data and a cache metadata are stored for data transfers between a respective node (hereinafter “first node”) and regions of a storage cluster. When the first node is disabled, data transfers are tracked between one or more active nodes of the plurality of nodes and cached regions of the storage cluster. When the first node is rebooted, at least a portion of valid cache data is retained based upon the tracked data transfers. Accordingly, local cache memory does not need to be entirely rebuilt each time a respective node is rebooted.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: June 16, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Cristian Simionescu, Luca Bert, Mark Ish
  • Patent number: 9037799
    Abstract: System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a portion of information stored by a first storage cache device and associated with a region of a primary storage device is received. When the validity of the portion of information associated with the region of the primary storage device is established, a region lock is requested on the region of the primary storage device associated with the portion of information stored by the first storage cache device. Then, the portion of information and the corresponding metadata entry associated with the region of the primary storage device is copied from the first cache storage device to a second storage cache device to rebuild the second storage cache device.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: May 19, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte Ltd
    Inventors: Sujan Biswas, Karimulla Sheik, Sumanesh Samanta, Debal K. Mridha, Naga S. Vadalamani
  • Publication number: 20150135006
    Abstract: The disclosure is directed to preserving data consistency in a multiple-node data storage system. According to various embodiments, a write log is maintained including log entries for data transfer requests being served by a respective node of the multiple-node data storage system. Rather than maintaining a full write journal of data and parity associated with each data transfer request, the log entries only need to identify portions of the virtual volume being updated according to the data transfer requests served by each node. When a first node fails, a second node takes over administration of a virtual volume for the failed node. Upon taking over for the first (failed) node, the second node resolves any inconsistencies between data and parity in portions of the virtual volume identified the respective log entries. Accordingly, write holes are prevented without substantially increasing memory usage or system complexity.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 14, 2015
    Applicant: LSI Corporation
    Inventors: Sumanesh Samanta, Horia Cristian Simionescu, Luca Bert, Debal Kr. Mridha, Mohana Rao Goli
  • Patent number: 9015525
    Abstract: A high availability DAS system uses a solid state cache to provide near active-active performance in a DAS duster, while retaining the implementation simplicity of active-passive or dual active system. Each node in the duster may include a solid state cache that stores hot I/O in an active-active mode, which allows the data to be read from or written to the underlying dual-active or active/passive DAS RAID system only when access to the “hot Region” cools down or in the case of Cache Miss. The hot I/O data includes hot read data that accumulated dynamically regardless of ownership of the drives where the hot read data is permanently stored. The hot I/O data also includes hot write data that is mirrored across the solid state cache memories to avoid potential dirty write data conflicts and also to provide High Availability in case of server failures.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: April 21, 2015
    Assignee: LSI Corporation
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Simionescu
  • Patent number: 8977893
    Abstract: A RAID data storage system incorporates permanently empty blocks into each stripe, distributed among all the data storage devices, to accelerate rebuild time by reducing the number of blocks that need to be rebuilt in the event of a failure.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: March 10, 2015
    Assignee: LSI Corporation
    Inventors: Sumanesh Samanta, Luca Bert, Satadal Bhattacharjee
  • Publication number: 20150026403
    Abstract: An apparatus having a cache and a controller is disclosed. The controller is configured to (i) gather a plurality of statistics corresponding to a plurality of requests made from one or more hosts to access a memory during an interval, (ii) store data of the requests selectively in the cache in response to a plurality of headers and (iii) adjust one or more parameters in the headers in response to the statistics. The requests and the parameters are recorded in the headers.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 22, 2015
    Applicant: LSI Corporation
    Inventors: Mark Ish, Sumanesh Samanta
  • Publication number: 20150019822
    Abstract: Nodes in a data storage system having redundant write caches identify when one node fails. A remaining active node stops caching new write operations, and begins flushing cached dirty data. Metadata pertaining to each piece of data flushed from the cache is recorded. Metadata pertaining to new write operations are also recorded a corresponding data flushed immediately when the new write operation involves data in the dirty data cache. When the failed node is restored, the restored node removes all data identified by the metadata from a write cache. Removing such data synchronizes the write cache with all remaining nodes without costly copying operations.
    Type: Application
    Filed: August 15, 2013
    Publication date: January 15, 2015
    Applicant: LSI Corporation
    Inventors: Sumanesh Samanta, Sujan Biswas, Karimulla Sheik, Thanu Anna Skariah, Mohana Rao Goli
  • Publication number: 20140351523
    Abstract: The disclosure is directed to a system and method for managing cache memory of at least one node of a multiple-node storage cluster. According to various embodiments, a first cache data and a first cache metadata are stored for data transfers between a respective node and regions of a storage cluster receiving at least a first selected number of data transfer requests. When the node is rebooted, a second (new) cache data is stored to replace the first (old) cache data. The second cache data is compiled utilizing the first cache metadata to identify previously cached regions of the storage cluster receiving at least a second selected number of data transfer requests after the node is rebooted. The second selected number of data transfer requests is less than the first selected number of data transfer requests to enable a rapid build of the second cache data.
    Type: Application
    Filed: June 25, 2013
    Publication date: November 27, 2014
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Cristian Simionescu, Luca Bert, Mark Ish
  • Publication number: 20140344523
    Abstract: The disclosure is directed to a system and method for managing READ cache memory of at least one node of a multiple-node storage cluster. According to various embodiments, a cache data and a cache metadata are stored for data transfers between a respective node (hereinafter “first node”) and regions of a storage cluster. When the first node is disabled, data transfers are tracked between one or more active nodes of the plurality of nodes and cached regions of the storage cluster. When the first node is rebooted, at least a portion of valid cache data is retained based upon the tracked data transfers. Accordingly, local cache memory does not need to be entirely rebuilt each time a respective node is rebooted.
    Type: Application
    Filed: June 24, 2013
    Publication date: November 20, 2014
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Cristian Simionescu, Luca Bert, Mark Ish
  • Patent number: 8893146
    Abstract: A method and system of a host device hosting multiple workloads for controlling flows of I/O requests directed to a storage device is disclosed. In one embodiment, a type of a response from the storage device reacting to an I/O request issued by an I/O stack layer of the host device is determined. Then, a workload associated with the I/O request is identified among the multiple workloads based on the response to the I/O request. Further, a maximum queue depth assigned to the workload is adjusted based on the type of the response, where the maximum queue depth is a maximum number of I/O requests from the workload which are concurrently issuable by the I/O stack layer.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 18, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kishore Kumar Muppirala, Narayanan Ananthakrishnan Nellayi, Sumanesh Samanta
  • Publication number: 20140229676
    Abstract: System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a portion of information stored by a first storage cache device and associated with a region of a primary storage device is received. When the validity of the portion of information associated with the region of the primary storage device is established, a region lock is requested on the region of the primary storage device associated with the portion of information stored by the first storage cache device. Then, the portion of information and the corresponding metadata entry associated with the region of the primary storage device is copied from the first cache storage device to a second storage cache device to rebuild the second storage cache device.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 14, 2014
    Applicant: LSI Corporation
    Inventors: Sujan Biswas, Karimulla Sheik, Sumanesh Samanta, Debal K. Mridha, Naga S. Vadalamani
  • Publication number: 20140173330
    Abstract: The invention provides for split brain detection and recovery in a DAS cluster data storage system through a secondary network interconnection, such as a SAS link, directly between the DAS controllers. In the event of a communication failure detected on the secondary network, the DAS controllers initiate communications over the primary network, such as an Ethernet used for clustering and failover operations, to diagnose the nature of the failure, which may include a crash of a data storage node or loss of a secondary network link. Once the nature of the failure has been determined, the DAS controllers continue to serve all I/O from the surviving nodes to honor high availability. When the failure has been remedied, the DAS controllers restore any local cache memory that has become stale and return to regular I/O operations.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 19, 2014
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Luca Bert, Sujan Biswas
  • Patent number: 8694699
    Abstract: Systems and methods for path selection for application commands are described. To this end, information associated with at least one application command that were processed at least one port of a target device is received. For a subsequent application command, a set of ports of the target device is determined. In one implementation, the set of ports is determined based on information associated with the subsequent application command. Once the set of ports is determined, the subsequent application command is directed to a port selected from the set of ports.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: April 8, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kishore Kumar Muppirala, Satish Kumar Mopur, Sumanesh Samanta, Dinkar Sitaram, Ayman Abouelwafa, Mustafa Uysal, Arif Merchant
  • Publication number: 20140089545
    Abstract: A method and system for IO processing in a storage system is disclosed. In accordance with the present disclosure, a controller may take long term “lease” of a portion (e.g., an LBA range) of a virtual disk of a RAID system and then utilize local locks for IOs directed to the leased portion. The method and system in accordance with the present disclosure eliminates inter-controller communication for the majority of IOs and improves the overall performance for a High Availability Active-Active DAS RAID system.
    Type: Application
    Filed: September 21, 2012
    Publication date: March 27, 2014
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Simionescu
  • Publication number: 20130339786
    Abstract: A high availability DAS system uses a solid state cache to provide near active-active performance in a DAS duster, while retaining the implementation simplicity of active-passive or dual active system. Each node in the duster may include a solid state cache that stores hot I/O in an active-active mode, which allows the data to be read from or written to the underlying dual-active or active/passive DAS RAID system only when access to the “hot Region” cools down or in the case of Cache Miss. The hot I/O data includes hot read data that accumulated dynamically regardless of ownership of the drives where the hot read data is permanently stored. The hot I/O data also includes hot write data that is mirrored across the solid state cache memories to avoid potential dirty write data conflicts and also to provide High Availability in case of server failures.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Sujan Biswas, Horia Simionescu
  • Publication number: 20130219214
    Abstract: A RAID data storage system incorporates permanently empty blocks into each stripe, distributed among all the data storage devices, to accelerate rebuild time by reducing the number of blocks that need to be rebuilt in the event of a failure.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: LSI CORPORATION
    Inventors: Sumanesh Samanta, Luca Bert, Satadal Bhattacharjee
  • Publication number: 20130055283
    Abstract: Methods to provide workload performance control are described herein. Performance statistics for a plurality of workloads are obtained for a second time interval, which includes a plurality of first time intervals. The performance statistics is based on monitored data (220) obtained at each of the plurality of first time intervals. From the plurality of workloads, at least one workload having an anomaly in resource allocation is identified using the performance statistics. Resources, to at least mitigate the anomaly are associated with the at least one workload.
    Type: Application
    Filed: May 7, 2010
    Publication date: February 28, 2013
    Inventors: Satish Kumar Mopur, Sumanesh Samanta, Dinkar Sitaram, Sijesh Thondapilly Balakrishnan