Abstract: A method for fabricating a semiconductor device includes: forming a first layer and a second layer in this order on a nitride semiconductor layer on a first main surface side of a substrate, the first and second layers having one of first and second arrangements, the first arrangement having the first layer of any of Au, V and Ta and the second layer of Ni, the second arrangement having the first layer of any of Ti, TiW, Al, W, Mo, Nb, Pt, Ta and V and the second layer of Au; forming a mask on a second main surface side of the substrate, the mask having an opening; applying an etching process to the substrate and the nitride semiconductor layer exposed in the opening of the mask; and determining an endpoint of the etching process by confirming elimination of the first layer in the opening of the mask.

Abstract: A semiconductor device includes a gate electrode formed on a nitride semiconductor layer, and a source electrode and a drain electrode provided on the nitride semiconductor layer so as to interpose the gate electrode therebetween, a first silicon nitride film that covers the gate electrode and the silicon nitride film and has a composition ratio of silicon to nitrogen equal to or larger than 0.75, the first silicon nitride film having compressive stress solely, and a second. silicon nitride film that is formed on the first silicon nitride film and has a composition ratio of silicon to nitrogen equal to or larger than 0.75 solely, a whole stacked layer structure of the first and second silicon nitride films having tensile stress.

Abstract: A semiconductor device includes: an operation layer that is provided on a substrate and is made of a GaAs-based semiconductor; a first AlGaAs layer provided on the operation layer; a gate electrode provided on the first AlGaAs layer; an second AlGaAs layer having n-type conductivity and provided on the first AlGaAs layer of both sides of the gate electrode, an Al composition ratio of the second AlGaAs layer being larger than that of the first AlGaAs layer and being equal to or more than 0.3 and equal to or less than 0.5; an n-type GaAs layer selectively provided on the second AlGaAs layer; and a source electrode and a drain electrode that contain Au and are provided on the n-type GaAs layer.

Abstract: A process to form a lens on a semiconductor material is disclosed. The process includes steps of: forming double layers of an intermediate layer on the semiconductor material and a mask layer made of hard-baked photoresist on the semiconductor substrate; the first transcribing the convex shape of the mask layer on the intermediate layer; and the second scribing the convex shape of the intermediate layer on the semiconductor material.

Abstract: A method to control an optical receiver implemented with a semiconductor optical amplifier (SOA) is disclosed. The SOA has a p-n junction operable in a PD mode when it is supplied with a zero or reverse bias. The SOA detects the magnitude of the incoming light and the driving current supplied thereto is adjusted based on thus detected magnitude of the incoming light such that the outgoing light provided to the PD has a magnitude within a preset range.

Abstract: A method to control an optical transceiver, in particular, to drive an LD installed within the optical transceiver is described. The LD in the bias current thereof is determined by the automatic power control (APC) loop to keep an average of the optical output power. The modulation current is determined by a feedback loop to keep the extinction ratio (ER) in a preset range. The initial condition of the modulation current for the feedback loop is set by T-Im characteristic. The T-Im characteristic is first derived based on data measured in a status of the LD not installed in the transceiver. The T-Im characteristic is revised timely by the modulation current practically obtained for the optical transceiver.

Abstract: A semiconductor light-receiving device includes two lenses; and a concave region, a height of the sidewall being higher than a top of the lenses, a distance between a position H and a lower edge of the sidewall vertical to a line segment C1 being grater than following condition: {(r+L)2?(W/2)2}1/2 where: C1 is a line segment connecting centers of the lenses; H is a midpoint of the C1; r is a radius of the lenses; W is an interval between the centers; and C2 is a lines passing through the centers in a direction vertical to the C1, wherein: the lower edge of the concave portion in an outer side of a region between the C2 is concentrically formed so as to have a distance of (r+L) from the center of the lenses; and W is following condition: W<2 (r+L).

Abstract: A control method of a semiconductor optical amplifier includes: controlling a driving current of the semiconductor optical amplifier in a region where a light output intensity decreases in accordance with increasing of the driving current, a drive current in the region being higher than a drive current in a region where a light output intensity increases in accordance with increasing of the driving current.

Abstract: A Doherty amplifier includes a carrier amplifier including a first FET, the first FET having a plurality of gate electrodes, and a peaking amplifier including a second FET, the second FET having a plurality of gate electrodes, a gate-to-gate interval of the gate electrodes of the second FET being shorter than a gate-to-gate interval of the first FET.

Abstract: A method for fabricating an optical device including: a first step of preparing a carrier having a first area and a second area, both edges of the second area having a wall of a step, one edge of the second area being adjacent to the first area, the first area having a first thickness, the second area having a second thickness larger than the first thickness, a second step of mounting the carrier on a temperature control device after the first step, and a third step of mounting a first optical component on the first area of the carrier after the second step.

Abstract: A capacitive element includes: an upper electrode; a lower electrode; and a dielectric layer that is disposed between the upper electrode and the lower electrode, and includes a first film, a second film and a third film which are made of any one of silicon nitride and aluminum oxide and laminated from a side of the lower electrode in order, a composition ratio of any one of silicon and aluminum in each of the first film and the third film being larger than a corresponding composition ratio in the second film.

Abstract: A method for manufacturing a semiconductor device includes: forming a first active region, a second active region, an inactive region located between the first active region and the second active region, and a third active region, which crosses the inactive region to electrically connect the first active region to the second active region, in a semiconductor layer; forming an insulating layer on the semiconductor layer; and forming an opening selectively in the insulating layer by dry etching.

Abstract: A semiconductor device includes: a substrate comprised by gallium arsenide; an active layer provided on the substrate; a first nickel-plated layer provided on a lower face of the substrate facing the active layer; a copper-plated layer provided on a lower face of the first nickel-plated layer; and a second nickel-plated layer provided on a lower face of the copper-plated layer.

Abstract: A high frequency circuit device includes: two transmission lines having ends which are opposed to each other and are spaced from each other; a capacitor that is mounted on the end of one of the two transmission lines and has a lower face electrode acting as a mount face and an upper face electrode positioned higher than the lower face electrode; a resistor element that is provided on a region between the ends of the two transmission lines and connects the ends of the two transmission lines; and a connection conductor electrically connecting the upper face electrode of the capacitor and the other of the two transmission lines.

Abstract: A method for manufacturing a semiconductor device includes: forming a metal layer on a semiconductor layer; forming a plated layer having a pattern corresponding to a pattern of a gate bus line which couples each gate finger of a plurality of FETs on the metal layer, the pattern corresponding to the pattern of the gate bus line having a deficient part; forming a mask layer which covers the metal layer exposed in the deficient part; and patterning the metal layer by using the plated layer and the mask layer as a mask.

Abstract: A semiconductor device includes: a foundation layer that is provided on a substrate and is electrically conductive; a nickel layer provided on the foundation layer; and a solder provided on the nickel layer, the nickel layer having a first region on a side of the foundation layer and a second region on a side of the solder, the second region being harder than the first region.