Patents by Inventor Sun Hyoung KWON

Sun Hyoung KWON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Broadcast signal frame generating apparatus and broadcast signal frame generating method using bootstrap and preamble
    Patent number: 11218352
    Abstract: An apparatus and method for broadcast signal frame using a bootstrap and a preamble are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: January 4, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Heung-Mook Kim
  • METHOD FOR GATEWAY SIGNALING FOR MISO OPERATION AND APPARATUS THEREFOR
    Publication number: 20210409155
    Abstract: Disclosed herein are a gateway-signaling method for Multiple-Input Single-Output (MISO) operation and an apparatus for the same. An apparatus for transmitting a broadcast signal according to an embodiment of the present invention includes a predistortion unit for performing predistortion for decorrelating signals corresponding to transmitters using the number of transmitters used for MISO and a transmitter coefficient index that are identified using a timing and management packet transmitted through a Studio-to-Transmitter Link (STL), thereby generating a pre-distorted signal; and an RF signal generation unit for generating an RF transmission signal using the pre-distorted signal corresponding to the transmitter coefficient index.
    Type: Application
    Filed: July 13, 2021
    Publication date: December 30, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Young LEE, Sung-Ik PARK, Sun-Hyoung KWON, Heung-Mook KIM, Nam-Ho HUR
  • Parity interleaving apparatus for encoding fixed-length signaling information, and parity interleaving method using same
    Patent number: 11206047
    Abstract: A parity interleaving apparatus and method for fixed length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: December 21, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim
  • Broadcast signal frame generation device and broadcast signal frame generation method using boundary of physical layer pipes of core layer
    Patent number: 11206103
    Abstract: An apparatus and method for broadcast signal frame using a boundary between Physical Layer Pipes (PLPs) of a core layer are disclosed.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: December 21, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sun-Hyoung Kwon, Jae-Young Lee, Sung-Ik Park, Bo-Mi Lim, Heung-Mook Kim, Jin-Hyuk Song
  • BROADCAST SIGNAL TRANSMITTING DEVICE AND BROADCAST SIGNAL TRANSMITTING METHOD WHICH USE CHANNEL BONDING
    Publication number: 20210367821
    Abstract: An apparatus and method for transmitting broadcast signal to which channel bonding is applied are disclosed. The apparatus according to the present invention includes an input formatting unit configured to generate baseband packets corresponding to a plurality of packet types using data corresponding to a physical layer pipe; a stream partitioner configured to partition the baseband packets into a plurality of partitioned streams corresponding to the plurality of packet types; BICM units configured to perform error correction encoding, interleaving and modulation corresponding to the plurality of partitioned streams, respectively; and waveform generators configured to generate RF transmission signals corresponding to the plurality of partitioned streams, respectively.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventors: Sung-Ik PARK, Jae-Young LEE, Sun-Hyoung KWON, Nam-Ho HUR, Heung-Mook KIM
  • BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 4096-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
    Publication number: 20210367615
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
    Type: Application
    Filed: August 2, 2021
    Publication date: November 25, 2021
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM, Nam-Ho HUR
  • BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 4/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
    Publication number: 20210359708
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 18, 2021
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Bo-Mi LIM, Jae-Young LEE, Heung-Mook KIM, Nam-Ho HUR
  • Broadcast signal transmission apparatus using transmission identifier and method using same
    Patent number: 11177898
    Abstract: An apparatus for transmitting broadcasting signal using transmitter identification and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: November 16, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same
    Patent number: 11177829
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: November 16, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Bo-Mi Lim, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 4/15 AND 1024-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
    Publication number: 20210351793
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
    Type: Application
    Filed: July 26, 2021
    Publication date: November 11, 2021
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM, Nam-Ho HUR
  • SIGNAL MULTIPLEXING DEVICE AND SIGNAL MULTIPLEXING METHOD USING LAYERED DIVISION MULTIPLEXING
    Publication number: 20210351970
    Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 11, 2021
    Inventors: Sung-Ik PARK, Jae-Young LEE, Sun-Hyoung KWON, Heung-Mook KIM, Nam-Ho HUR
  • Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 4096-symbol mapping, and bit interleaving method using same
    Patent number: 11159177
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: October 26, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Signal multiplexing device and signal multiplexing method using layered division multiplexing
    Patent number: 11153723
    Abstract: A signal multiplexing apparatus and method using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame using the time-interleaved signal and L1 signaling information.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: October 19, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sun-Hyoung Kwon, Sung-Ik Park, Jae-Young Lee
  • Broadcast signal transmitting device and broadcast signal transmitting method which use channel bonding
    Patent number: 11128509
    Abstract: An apparatus and method for transmitting broadcast signal to which channel bonding is applied are disclosed. The apparatus according to the present invention includes an input formatting unit configured to generate baseband packets corresponding to a plurality of packet types using data corresponding to a physical layer pipe; a stream partitioner configured to partition the baseband packets into a plurality of partitioned streams corresponding to the plurality of packet types; BICM units configured to perform error correction encoding, interleaving and modulation corresponding to the plurality of partitioned streams, respectively; and waveform generators configured to generate RF transmission signals corresponding to the plurality of partitioned streams, respectively.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: September 21, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Nam-Ho Hur, Heung-Mook Kim
  • Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 4096-symbol mapping, and bit interleaving method using same
    Patent number: 11115053
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: September 7, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 7/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME
    Publication number: 20210273657
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM, Nam-Ho HUR
  • Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 1024-symbol mapping, and bit interleaving method using same
    Patent number: 11108409
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: August 31, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 64-symbol mapping, and bit interleaving method using same
    Patent number: 11108414
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: August 31, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Bo-Mi Lim, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • PARITY PUNCTURING DEVICE FOR VARIABLE-LENGTH SIGNALING INFORMATION ENCODING, AND PARITY PUNCTURING METHOD USING SAME
    Publication number: 20210266013
    Abstract: A parity puncturing apparatus and method for variable length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM
  • Signal multiplexing device and signal multiplexing method using layered division multiplexing
    Patent number: 11102048
    Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 24, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Heung-Mook Kim, Nam-Ho Hur