Abstract: A paste for a photoelectric conversion layer used in an X-ray detector includes photoconductive particles, an organic polymer binder, a first organic solvent to dissolve the organic polymer binder, and a second organic solvent. The second organic solvent has a boiling point in a range of between about 150° C. and about 210° C., inclusive.

Abstract: An optical head for a hologram optical apparatus and a method of operating the same are provided. The optical head for the hologram optical apparatus includes a reference light unit for guiding reference light, a signal light unit for guiding signal light, and a light source unit for providing 1 the reference light and the signal light to the reference light unit and the signal light unit, wherein the reference light unit and the signal light unit are stacked. The signal light unit includes: a plurality of optical waveguides stacked sequentially; composite hologram optical elements and lighting hologram optical elements disposed on the plurality of optical waveguides; an optical modulator for modulating light output from the plurality of the optical waveguides; and a lens for condensing light output from the optical modulator onto a recording layer.

Abstract: A transistor according to example embodiments may include a channel layer, a source and a drain respectively contacting ends of the channel layer, a gate electrode separated from the channel layer, a gate insulating layer interposed between the channel layer and the gate electrode, and/or an insertion layer that is formed between the channel layer and the gate insulating layer. The insertion layer may have a work function different from that of the channel layer.

Abstract: A thin film transistor (TFT) may include a channel layer, a source electrode, a drain electrode, a protective layer, a gate electrode, and/or a gate insulating layer. The channel layer may include an oxide semiconductor material. The source electrode and the drain electrode may face each other on the channel layer. The protective layer may be under the source electrode and the drain electrode and/or may cover the channel layer. The gate electrode may be configured to apply an electric field to the channel layer. The gate insulating layer may be interposed between the gate electrode and the channel layer.

Abstract: Provided are a substrate structure and method of forming the same. The method of forming the substrate structure may include etching a substrate to form an etched portion having a vertical surface, forming a diffusion material layer on the whole substrate or in part of the substrate; annealing the diffusion material layer to form a seed layer diffused downward toward the surface of the etched portion, and forming a metal layer on the seed layer. Accordingly, surface characteristics of the etched portion of the substrate may be enhanced by the seed layer, and therefore, a metal layer with improved adhesion and a uniform thickness may be formed on the vertical surface of the etched portion.

Abstract: A transistor may include: a gate insulting layer, a gate electrode formed on a bottom side of the gate insulating layer, a channel layer formed on a top side of the gate insulating layer, a source electrode that contacts a first portion of the channel layer, and a drain electrode that contacts a second portion of the channel layer. The channel layer may have a double-layer structure, including an upper layer and a lower layer. The upper layer may have a carrier concentration lower than that of the lower layer. The upper layer may be doped with a carrier acceptor in order to have an electrical resistance higher than that of the lower layer.

Abstract: An X-ray detector may include a silicon substrate including a first area and a second area; a plurality of pixels in the first area configured to detect X-rays; a control pad in the second area configured to supply a common control signal to the plurality of pixels; and/or a power supply pad in the first area configured to supply a power supply voltage to groups of pixels grouped from among the plurality of pixels.

Abstract: A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.

Abstract: A method of multi-stage substrate etching and a terahertz oscillator manufactured by using the method are provided. The method comprises the steps of forming a first mask pattern on any one surface of a first substrate, forming a hole by etching the first substrate using the first mask pattern as an etching mask, bonding, to the first substrate, a second substrate having the same thickness as a depth to be etched, forming a second mask pattern on the second substrate bonded, forming a hole by etching the second substrate using the second mask pattern as an etching mask, and removing an oxide layer having the etching selectivity between the first substrate and the second substrate.

Abstract: Provided is a complementary metal oxide semiconductor (CMOS) image sensor having a structure capable of increasing areas of photodiodes in unit pixels and expanding light receiving areas of the photodiodes. In the CMOS image sensor, transfer transistors may be formed on the photodiode, and reset transistors, source follower transistors, and selection transistors may be formed on a layer on which the transfer transistors are not formed. In such a CMOS image sensor, the areas of the photodiodes may be increased in unit pixels so that a size of the unit pixels may be reduced and sensitivity of the pixel may be improved.

Abstract: A detector includes a substrate; two first regions, each first region having a linear shape, and the two first regions being separated from each other on the substrate and arranged in parallel; and a pixel region provided between the two first regions and including a plurality of pixels, the pixel region including a plurality of second regions perpendicular to the two first regions, each of the two first regions including a peripheral circuit portion, each of the plurality of second regions including a driver line, and a width of each of the plurality of second regions being equal to or less than a width of a single pixel.

Abstract: A wafer-scale x-ray detector and a method of manufacturing the same are provided. The wafer-scale x-ray detector includes: a seamless silicon substrate electrically connected to a printed circuit substrate; a chip array having a plurality of pixel pads formed on a central region thereof and a plurality of pin pads formed at edges thereof on the seamless silicon substrate; a plurality of pixel electrodes formed to correspond to the pixel pads; vertical wirings and horizontal wirings formed to compensate a difference of regions expanded towards the pixel electrodes from the pixel pads between the chip array and the pixel electrodes; a redistribution layer having an insulating layer to separate the vertical wirings and the horizontal wirings; and a photoconductor layer and a common electrode which cover the pixel electrodes on the redistribution layer.

Abstract: An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.

Abstract: Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).

Abstract: An active optical device and a display apparatus including the same are provided. The active optical device includes: first to third electrodes that are sequentially disposed spaced apart from one another; a first refractive index change layer disposed between the first electrode and the second electrode and in which a refractive index is changed by an electric field; and a second refractive index change layer disposed between the second electrode and the third electrode and in which a refractive index is changed by an electric field.

Abstract: Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Ta and Y atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Ta and Y atoms added thereto.

Abstract: Transistors, electronic devices including a transistor and methods of manufacturing the same are provided, the transistor includes an oxide semiconductor layer (as a channel layer) having compositions that vary in one direction. The channel layer may be an oxide layer including a first element, a second element, and Zn, which are metal elements. The amount of at least one of the first element, the second element, and Zn may change in a deposition direction of the channel layer. The first element may be any one of hafnium (Hf), yttrium (Y), tantalum (Ta), zirconium (Zr), gallium (Ga), aluminum (Al) or combinations thereof. The second element may be indium (In). The channel layer may have a multi-layered structure including at least two layers with different compositions.

Abstract: A method of multi-stage substrate etching, includes forming a first mask pattern on one surface of a first substrate; forming a hole by etching the first substrate using the first mask pattern as an etching mask; forming a second mask pattern on one surface of a second substrate; forming a hole by etching the second substrate to a predetermined depth using the second mask pattern as an etching mask; bonding the first and second substrates together such that an etched surface of the first substrate faces an etched surface of the second substrate; forming a third mask pattern on the second substrate; and forming a hole passing through the second substrate by etching the second substrate using the third mask pattern as an etching mask, whereby it is prevented the occurrence of a radius of curvature in the bottom surface and the overhang structure occurring on a step surface.

Abstract: Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device.