Abstract: A filtering panel includes a molding layer part; a pattern layer part having an incident surface through which light emitted from a light source and viewing light transmitted to an observer enter, and an accommodation surface which is the reverse surface of the incident surface, wherein the molding layer part is stacked on the incident surface so as to be adjacent thereto, and the pattern layer part adjusts the optical paths of the emitted light and the viewing light; and a filtering layer part formed on a lower incident surface of the pattern layer part having the incident surface of the viewing light that enters from a lower region below a horizontal reference line, wherein the reflectivity of the visible light in the viewing light incident on the lower region is made greater than that of an upper region above the reference line by means of mirror reflection.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a transceiver including an amplifier region configured to output a data signal to a source line connected to a pixel during a first period and receive a detection signal from a touch electrode during a second period different from the first period, and configured to generate the data signal based on input data; and a driving controller configured to generate the data based on input image data, outputting the data to the transceiver, and generate a touch signal based on the detection signal.

Abstract: Disclosed are an anti-glare coating resin composition and an anti-glare coating film including the same. Specifically, provided are an anti-glare coating resin composition that includes a siloxane resin containing an epoxy group and an acrylic group, and further includes organic or inorganic particles, and thus ensures hardness, scratch resistance and processability, and provides anti-glare property by introduction of particles, and an anti-glare coating film produced using the same. Also, it is possible to realize hardness, abrasion resistance and anti-glare property of a film resin prepared using the resin composition and a film produced using the same.

Abstract: The present disclosure provides a locking structure of a valve timing adjustment apparatus for an internal combustion engine, using torque from a camshaft and the pressure of working fluid. The locking structure includes an anti-rotation mechanism for inhibiting or preventing a position change between a rotor and a housing by preventing relative rotation of the rotor to the housing. The anti-rotation mechanism further includes: a plurality of locking grooves which are formed on the ratchet plate with different depths and connected to each other; and a locking pin member. In particular, the locking pin member has: a hollow outer pin elastically disposed in a fitting hole formed in vanes, an inner pin elastically disposed inside the outer pin, and a lifter ring coupled to the upper portion of the outer pin to slide on the inner side of the fitting hole.

Abstract: The present disclosure provides a valve timing adjustment apparatus for an internal combustion engine. The apparatus includes an anti-rotation mechanism for inhibiting a position change between a rotor and a housing by inhibiting or preventing relative rotation of the rotor to the housing. The anti-rotation mechanism includes: a plurality of locking grooves formed on the ratchet plate with different depths and connected to each other; and a locking pin member having an outer pin elastically disposed in a fitting hole formed in one of the vanes, and an inner pin elastically disposed inside the outer pin. In particular, the inner pin locks the rotor to the housing when the outer pin and the inner pin are sequentially fitted in the locking grooves by torque from the camshaft.

Abstract: Disclosed is an apparatus of adjusting valve timing for internal combustion engine configured to adjust at least one valve timing of an intake valve and an exhaustive valve by torque of a cam shaft and pressure of working fluid, and a method thereof. The method of the present disclosure is such that a rotor is embedded with a hydraulic control valve configured to operate a locking pin member, and the hydraulic control valve is so configured as to have various control positions in order to supply or discharge working fluid in response to engine emergency stop or start and normal engine operational state whereby locking and releasing operations are realized with accurate responsiveness and reliability due to smaller working fluid through a passage and an engine performance can be improved by adjusting the valve timing.

Abstract: An oil drain structure of a valve timing adjusting device for an internal combustion engine is provided to adjust a valve timing of at least one of an intake valve and an exhaust valve by a torque of a cam shaft and a pressure of a working fluid. The oil drain structure of the valve timing adjusting device includes a rotation preventing means to suppress a position change between a rotor and a housing by regulating a relative rotation of the rotor with respect to the housing.

Abstract: The present disclosure provides a hydraulic control valve for a valve timing adjusting device of an engine. The valve timing adjusting device has a hydraulic control valve; a housing; a rotor installed in the housing and having vanes forming advance, retard and locking chambers, respectively; and a locking pin member elastically installed at the locking chamber. In particular, the hydraulic control valve includes: a valve body connected to the camshaft and having ports and a spool space; an outer spool elastically installed in the spool space and having distribution ports selectively communicated with or disconnected to the ports of the valve body; and an inner spool that is integrally coupled to the outer spool and forms a supply passage connected to a working fluid pump and a drain passage connected to a drain tank together.

Abstract: The present disclosure provides a hydraulic control valve for a valve timing adjusting device of an engine. The valve timing adjusting device has a hydraulic control valve; a housing; a rotor installed in the housing and having vanes forming advance, retard and locking chambers, respectively; and a locking pin member elastically installed at the locking chamber. In particular, the hydraulic control valve includes: a valve body connected to the camshaft and having ports and a spool space; an outer spool elastically installed in the spool space and having distribution ports selectively communicated with or disconnected to the ports of the valve body; and an inner spool that is integrally coupled to the outer spool and forms a supply passage connected to a working fluid pump and a drain passage connected to a drain tank together.

Abstract: Disclosed is an apparatus of adjusting valve timing for internal combustion engine configured to adjust at least one valve timing of an intake valve and an exhaustive valve by torque of a cam shaft and pressure of working fluid, and a method thereof. The method of the present disclosure is such that a rotor is embedded with a hydraulic control valve configured to operate a locking pin member, and the hydraulic control valve is so configured as to have various control positions in order to supply or discharge working fluid in response to engine emergency stop or start and normal engine operational state whereby locking and releasing operations are realized with accurate responsiveness and reliability due to smaller working fluid through a passage and an engine performance can be improved by adjusting the valve timing.

Abstract: An oil drain structure of a valve timing adjusting device for an internal combustion engine is provided to adjust a valve timing of at least one of an intake valve and an exhaust valve by a torque of a cam shaft and a pressure of a working fluid. The oil drain structure of the valve timing adjusting device includes a rotation preventing means to suppress a position change between a rotor and a housing by regulating a relative rotation of the rotor with respect to the housing.

Abstract: The present disclosure provides a valve timing adjustment apparatus for an internal combustion engine. The apparatus includes an anti-rotation mechanism for inhibiting a position change between a rotor and a housing by inhibiting or preventing relative rotation of the rotor to the housing. The anti-rotation mechanism includes: a plurality of locking grooves formed on the ratchet plate with different depths and connected to each other; and a locking pin member having an outer pin elastically disposed in a fitting hole formed in one of the vanes, and an inner pin elastically disposed inside the outer pin. In particular, the inner pin locks the rotor to the housing when the outer pin and the inner pin are sequentially fitted in the locking grooves by torque from the camshaft.

Abstract: The present disclosure provides a locking structure of a valve timing adjustment apparatus for an internal combustion engine, using torque from a camshaft and the pressure of working fluid. The locking structure includes an anti-rotation mechanism for inhibiting or preventing a position change between a rotor and a housing by preventing relative rotation of the rotor to the housing. The anti-rotation mechanism further includes: a plurality of locking grooves which are formed on the ratchet plate with different depths and connected to each other; and a locking pin member. In particular, the locking pin member has: a hollow outer pin elastically disposed in a fitting hole formed in vanes, an inner pin elastically disposed inside the outer pin, and a lifter ring coupled to the upper portion of the outer pin to slide on the inner side of the fitting hole.

Abstract: A read/write cache device and method persistent in the event of a power failure are disclosed herein. The read/write cache device includes a meta-information part, a recency/frequency (RF) table part, a mapping table part, and a log area. The meta-information part provides information about whether metadata has integrity and information about the version of metadata stored in two metadata regions. The RF table part provides information about the recency and frequency of each of low-speed segments of a plurality of high-speed and low-speed segments and information about whether each of the low-speed segments is cached, in order to maintain the consistency of the metadata. The mapping table part provides information about a low-speed segment that is cached to each of the high-speed segments. The log area provides changed caching information that is not applied into the mapping table part.

Abstract: A read/write cache device and method persistent in the event of a power failure are disclosed herein. The read/write cache device includes a meta-information part, a recency/frequency (RF) table part, a mapping table part, and a log area. The meta-information part provides information about whether metadata has integrity and information about the version of metadata stored in two metadata regions. The RF table part provides information about the recency and frequency of each of low-speed segments of a plurality of high-speed and low-speed segments and information about whether each of the low-speed segments is cached, in order to maintain the consistency of the metadata. The mapping table part provides information about a low-speed segment that is cached to each of the high-speed segments. The log area provides changed caching information that is not applied into the mapping table part.

Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.

Abstract: Provided is a flash memory address translation method that may maintain at least one chip that may be divided based on at least one horizontal bank and at least one vertical channel, and may divide the at least one bank by at least one stripe partition, managing an error of a chip without deterioration in a performance of a small writing.

Abstract: A method for parity resynchronization in disk arrays, in which an intent log comprising a list of addresses of pieces of data stored in a data write cache is generated. The pieces of data of the data write cache are written to a disk while the pieces of data are withdrawn from the data write cache. When power supply is interrupted during writing of the data to the disk, a processor supplies power to the disk to resume an operation of the disk, checks whether parity mismatch has occurred on the data of the disk corresponding to the data address list, and corrects a parity mismatch block using a parity block. When the consistency of data is damaged by unexpected power interruption, data being written is compared with a pre-stored intent log, shortening the time required for parity resynchronization.

Abstract: A method is provided for operating a data storage device comprising a storage medium and a controller configured to control operations of the storage medium. The method comprises determining whether a read-requested data strip is an error data strip, reading a plurality of data strips in a stripe comprising the read-requested data strip when the read-requested data strip is the error data strip, outputting a data strip recovered using the other data strip except the error data strip among the plurality of data strips, and writing the recovered data strip and the other data strips into the storage medium.

Abstract: A method is provided for performing a write operation in a data storage device comprising a storage medium, a processing unit, and a buffer memory storing data to be transferred to the storage medium under control of the processing unit. The method comprises aggregating data in the buffer memory as a strip group comprising multiple data strips, transferring data strips in at least one strip group to the storage medium, calculating a parity strip based on the transferred data strips of the at least one strip group without additional access to the buffer memory, and transferring the parity strip to the storage medium.