Patents by Inventor Sung-Joo Yoo

Sung-Joo Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210005603
    Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
    Type: Application
    Filed: September 18, 2020
    Publication date: January 7, 2021
    Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
  • Patent number: 10860323
    Abstract: Provided is a method and apparatus for processing instructions using a processing-in-memory (PIM). A PIM management apparatus includes: a PIM directory comprising a reader-writer lock regarding a memory address that an instruction accesses; and a locality tracer configured to figure out locality regarding the memory address that the instruction accesses and determine whether or not an object that executes the instruction is a PIM.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiyoung Choi, Jun-whan Ahn, Sung-joo Yoo
  • Patent number: 10804265
    Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: October 13, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Min Yoo, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
  • Patent number: 10785491
    Abstract: A method of visualizing an image, a device and a system using the same. The method of visualizing, by a device operatively connected with an image provision server, an image configured in a hierarchical structure including a plurality of levels includes receiving tile visualization information in an encoded form from the image provision server, the tile visualization information including a tile visualization type determined according to whether at least one tile belonging to each of the levels of the image includes data; decoding the encoded tile visualization information and obtaining the tile visualization information; making a request to the image providing server for data for a target level and tile, which are to be visualized according to the tile visualization information; and displaying an image, which is to be visualized, received from the image provision server.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 22, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Jun Yoo, In Sung Jang, Hyoung Sun Kim, A Hyun Lee, Jung Hee Jo, In Hak Joo
  • Publication number: 20200295028
    Abstract: A method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-layered stack into dummy stacks, and forming an asymmetric stepped trench that is extended downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack, wherein forming the asymmetric stepped trench includes forming a first stepped sidewall that is defined at an edge of the pad stack, and forming a second stepped sidewall that is defined at an edge of the dummy pad stack and occupies less area than the first stepped sidewall.
    Type: Application
    Filed: September 13, 2019
    Publication date: September 17, 2020
    Inventors: Eun-Ho KIM, Eun-Joo JUNG, Jong-Hyun YOO, Ki-Jun YUN, Sung-Hoon LEE
  • Patent number: 10636793
    Abstract: A FINFET includes a first fin extending in a first direction on a substrate and, a second fin extending in the first direction and spaced apart from the first fin in the first direction. A third fin is provided with a long side shorter than long sides of the first fin and the second fin and is disposed between the first fin and the second fin. A first gate structure extends in a second direction different from the first direction and crosses the first fin. A device isolation layer is disposed on a lower sidewall of each of the first, second and third fins and is formed to extend in the first direction. An electrically insulating diffusion break region includes a first portion crossing between the first fin and the third fin, a second portion crossing between the second fin and the third fin, and a third portion disposed between the first portion and the second portion on the third fin. The diffusion break region extends in the second direction on the device isolation layer.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 28, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung Joo Na, Ju Youn Kim, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
  • Publication number: 20200057934
    Abstract: Proposed are a method and apparatus for accelerating data processing in a neural network. The apparatus for accelerating data processing in a neural network may include: a control unit configured to quantize data by at least one method according to a characteristic of data calculated at a node forming at least one layer constituting the neural network, and to separately perform calculation at the node according to the quantized data; and memory configured to store the quantized data.
    Type: Application
    Filed: October 25, 2019
    Publication date: February 20, 2020
    Inventors: Sung Joo YOO, Eun Hyeok PARK
  • Publication number: 20200043929
    Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.
    Type: Application
    Filed: March 29, 2019
    Publication date: February 6, 2020
    Inventors: Eui Chul HWANG, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Sang Min YOO, Joo Ho JUNG, Sung Moon LEE
  • Publication number: 20200043920
    Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
    Type: Application
    Filed: April 12, 2019
    Publication date: February 6, 2020
    Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
  • Publication number: 20190393220
    Abstract: A FINFET includes a first fin extending in a first direction on a substrate and, a second fin extending in the first direction and spaced apart from the first fin in the first direction. A third fin is provided with a long side shorter than long sides of the first fin and the second fin and is disposed between the first fin and the second fin. A first gate structure extends in a second direction different from the first direction and crosses the first fin. A device isolation layer is disposed on a lower sidewall of each of the first, second and third fins and is formed to extend in the first direction. An electrically insulating diffusion break region includes a first portion crossing between the first fin and the third fin, a second portion crossing between the second fin and the third fin, and a third portion disposed between the first portion and the second portion on the third fin. The diffusion break region extends in the second direction on the device isolation layer.
    Type: Application
    Filed: November 29, 2018
    Publication date: December 26, 2019
    Inventors: Hyung Joo Na, Ju Youn Kim, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
  • Patent number: 10475503
    Abstract: A circuit for selecting a row of memory cells of a memory device to be refreshed may include: a cold table suitable for storing as a cold row a row selected as a hammered row when the row selected as the hammered row is neither one of cold rows stored in the cold table nor one of hot rows stored in a hot table; and the hot table suitable for storing, as a hot row, the row selected as the hammered row when the row selected as the hammered row is one of the cold rows stored in the cold table.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: November 12, 2019
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Sung-Joo Yoo, Mun-Gyu Son
  • Publication number: 20190261009
    Abstract: A method of visualizing an image, a device and a system using the same. The method of visualizing, by a device operatively connected with an image provision server, an image configured in a hierarchical structure including a plurality of levels includes receiving tile visualization information in an encoded form from the image provision server, the tile visualization information including a tile visualization type determined according to whether at least one tile belonging to each of the levels of the image includes data; decoding the encoded tile visualization information and obtaining the tile visualization information; making a request to the image providing server for data for a target level and tile, which are to be visualized according to the tile visualization information; and displaying an image, which is to be visualized, received from the image provision server.
    Type: Application
    Filed: November 30, 2018
    Publication date: August 22, 2019
    Inventors: Jae Jun YOO, In Sung JANG, Hyoung Sun KIM, A Hyun LEE, Jung Hee JO, In Hak JOO
  • Patent number: 10387014
    Abstract: A method and a mobile terminal for controlling the icons of the mobile terminal are provided. The method includes displaying at least one icon on a widget screen corresponding with a function for changing the size of the icon displayed on a touch screen; receiving a selection of an icon to which the function is to be applied; activating an attribute of the selected icon; and adjusting, if a side of the selected icon is dragged on the widget screen, a size of the selected icon according to a direction of the drag.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: August 20, 2019
    Assignees: Samsung Electronics Co., Ltd, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: So-Young Kim, Yong-Gu Ji, Sung-Joo Ahn, Hwan Hwangbo, Hyo-Chang Kim, Jung-Hoon Park, Hyung-Jun Oh, Hyun-Guk Yoo, Gyeong-Ho Chu
  • Publication number: 20180342281
    Abstract: A circuit for selecting a row of memory cells of a memory device to be refreshed may include: a cold table suitable for storing as a cold row a row selected as a hammered row when the row selected as the hammered row is neither one of cold rows stored in the cold table nor one of hot rows stored in a hot table; and the hot table suitable for storing, as a hot row, the row selected as the hammered row when the row selected as the hammered row is one of the cold rows stored in the cold table.
    Type: Application
    Filed: May 21, 2018
    Publication date: November 29, 2018
    Inventors: Sung-Joo YOO, Mun-Gyu SON
  • Publication number: 20180336035
    Abstract: Provided is a method and apparatus for processing instructions using a processing-in-memory (PIM). A PIM management apparatus includes: a PIM directory comprising a reader-writer lock regarding a memory address that an instruction accesses; and a locality tracer configured to figure out locality regarding the memory address that the instruction accesses and determine whether or not an object that executes the instruction is a PIM.
    Type: Application
    Filed: June 10, 2016
    Publication date: November 22, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kiyoung CHOI, Jun-whan AHN, Sung-joo YOO
  • Patent number: 9668219
    Abstract: A power reduction method for a multi-path receiver including multi-receivers, includes detecting a state of the multi-receivers, and controlling clock gating or power gating of the multi-receivers based on the state.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: May 30, 2017
    Assignees: Samsung Electronics Co., Ltd., Postech Academy—Industry Foundation
    Inventors: Jong Han Kim, Young Geun Choi, Sung Joo Yoo, Joon Seong Kang, Young Jun Hong
  • Patent number: 9304967
    Abstract: Provided is a reconfigurable processor that may process a first type of operation in first mode using a first group of functional units, and process a second type of operation in second mode using a second group of functional units. The reconfigurable processor may selectively supply power to either the first group or the second group, in response to a mode-switch signal or a mode-switch instruction.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: April 5, 2016
    Assignees: Samsung Electronics Co., Ltd., POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Sung-Joo Yoo, Yeon-Gon Cho, Bernhard Egger, Won-Sub Kim, Hee-Jin Ahn
  • Patent number: 9110858
    Abstract: An apparatus and method for controlling a low-voltage memory in a mobile communication system are provided. The apparatus includes a memory for storing data including at least one error caused by a low-voltage, and an error correction unit for identifying whether the at least one error exists in the memory according to a first bit set in a local buffer of an error correction code storage, for comparing location information on the error data read from the memory and location information on error data of at least one protection set in the local buffer of the error correction code storage when it is determined that the at least one error exists in the memory, for generating an error correction code as a result of the comparison, and for correcting the error data of the memory according to the error correction code.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: August 18, 2015
    Assignees: Samsung Electronics Co., Ltd., Postech Academy Industry Foundation
    Inventors: Kang-Min Lee, Sung-Joo Yoo
  • Publication number: 20150026394
    Abstract: A method of operating a memory system includes the operations of outputting dirty cache lines from a data cache to a volatile memory device as instructions are executed, and outputting from the volatile memory device to a non-volatile memory device as many dirty cache lines as the size of a page of the non-volatile memory.
    Type: Application
    Filed: July 8, 2014
    Publication date: January 22, 2015
    Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: CHAN IK PARK, CHAN HA KIM, HYUN SUN PARK, SUNG JOO YOO
  • Publication number: 20140250345
    Abstract: An apparatus and method for controlling a low-voltage memory in a mobile communication system are provided. The apparatus includes a memory for storing data including at least one error caused by a low-voltage, and an error correction unit for identifying whether the at least one error exists in the memory according to a first bit set in a local buffer of an error correction code storage, for comparing location information on the error data read from the memory and location information on error data of at least one protection set in the local buffer of the error correction code storage when it is determined that the at least one error exists in the memory, for generating an error correction code as a result of the comparison, and for correcting the error data of the memory according to the error correction code.
    Type: Application
    Filed: June 11, 2013
    Publication date: September 4, 2014
    Inventors: Kang-Min LEE, Sung-Joo YOO