Patents by Inventor Sung-Kao Liu

Sung-Kao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12032505
    Abstract: A command transforming method, applied to a command transforming system comprising a first transceiving interface and a second transceiving interface, comprising: receiving at least one command transmitted from a first device via the first transceiving interface; determining a first sequence rule of the first device and a second sequence rule of a second device, wherein the first sequence rule means if the first device is required to process the command in sequence and the second sequence rule means if the second device is required to process the command in sequence; transmitting the command to the second device via the second transceiving interface; processing the command by the second device according to the second sequence rule and transmitting a response corresponding to the command to the second transceiving interface by the second device; and transmitting the response to the first device according to the first sequence rule.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: July 9, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Cheng Tsai, Chi-Rung Wu
  • Publication number: 20240211012
    Abstract: Dynamic management method and system for an active state power management (ASPM) mechanism are provided. The method is applicable to a peripheral component interconnect express (PCIe) transmission architecture that includes a host and a PCIe downstream component. The method includes: configuring the PCIe downstream component to perform: determining whether data transmission status between a PCIe upstream component and the PCIe downstream component is in a busy state, a stable idle state or a temporary state; in response to determining that the data transmission status is in the busy state, forcibly disabling the ASPM function; in response to determining that the data transmission state is in the stable idle state, forcibly enabling the ASPM function; and in response to determining that the data transmission state is in the temporary state, determining whether the data transmission state is the busy state, the stable idle state or the temporary state again.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 27, 2024
    Inventors: QIN ZHU, JUN-JIANG HUANG, CHANG-CHUN LI, CHUN-HAO LIN, SUNG-KAO LIU, XING WANG, CHIN-WEI HSU, CHUN-WEI GU
  • Publication number: 20240211421
    Abstract: The present application discloses an adapter for data transmission between a first communication device and a second communication device, in which the first communication device reads data in the second communication device, and the data includes a plurality of data segments, wherein a size of each data segment is the maximum transmission unit of the second communication device. The adapter includes a buffer and a plurality of counters. The buffer stores the data transmitted by the second communication device temporarily. The plurality of counters are initially set to zero. Each counter corresponds to each data segment and indicates a size of partial data of each data segment that has been stored. The adapter transmits the partial data to the first communication device, when each counter indicates that the size of the partial data reaches a predetermined transmission unit but does not reach the maximum transmission unit.
    Type: Application
    Filed: December 13, 2023
    Publication date: June 27, 2024
    Inventors: CHI RUNG WU, SUNG KAO LIU, CHENG YUAN HSIAO, CHIEN MIN CHEN
  • Publication number: 20240126633
    Abstract: A method for responding to a command is adapted for a storage device. The method for responding to a command includes following steps of: sequentially receiving a first command and a second command by a bridge of the storage device from a host; executing the first command and the second command to generate a status completion signal or a status error signal by the bridge; and detecting an error state of at least one of the first command and the second command to execute a response mode or an idle mode by the bridge according to the error state so as to respond to the host.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 18, 2024
    Inventors: Yi Cheng TSAI, Sung-Kao LIU, Cheng-Yuan HSIAO, Po-Hao CHEN
  • Publication number: 20230153262
    Abstract: A command transforming method, applied to a command transforming system comprising a first transceiving interface and a second transceiving interface, comprising: receiving at least one command transmitted from a first device via the first transceiving interface; determining a first sequence rule of the first device and a second sequence rule of a second device, wherein the first sequence rule means if the first device is required to process the command in sequence and the second sequence rule means if the second device is required to process the command in sequence; transmitting the command to the second device via the second transceiving interface; processing the command by the second device according to the second sequence rule and transmitting a response corresponding to the command to the second transceiving interface by the second device; and transmitting the response to the first device according to the first sequence rule.
    Type: Application
    Filed: February 23, 2022
    Publication date: May 18, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Cheng Tsai, Chi-Rung Wu
  • Publication number: 20230153259
    Abstract: A data transmission method, applied to a data transmission system comprising a reception interface and a plurality of transmission interfaces, comprising: (a) receiving first transmission information from a source device via the reception interface, wherein the first transmission information comprises information of data groups corresponding to at least two of the transmission interfaces; and (b) transmitting at least portion of the data groups by a corresponding one of the transmission interfaces in turn to a target device which corresponds to the data group comprising the portion, according to the first transmission information, until transmission of all of the data groups is completed.
    Type: Application
    Filed: March 10, 2022
    Publication date: May 18, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Chih-Yu Hsu, Wei-Hung Chuang
  • Patent number: 11334506
    Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: May 17, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Wei-Hung Chuang, Li-Chiao Hung, Hung-Tai Chen
  • Patent number: 11281516
    Abstract: An error handling method for a transmission interface connecting between a first device and a second device for performing data transmission between the first device and the second device, wherein a connection type between the transmission interface and the first device is a direct interface (DI) and the connection type between the transmission interface and the second device is an indirect interface (II), and the error handling method comprises: when an error is detected at the direct interface, reporting an error event to a host of the first device; when an error is detected at the indirect interface, attempting to handle the error without letting the host discover it; and when the error detected at the indirect interface is determined as unable to be solved, reporting another error event to the host.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: March 22, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Patent number: 11216398
    Abstract: The invention provides a USB device and a data transfer method thereof. The USB device is coupled to a host and transfers at least one packet to the host. The USB device includes a memory, a USB controller, and a transfer management circuit. The memory stores packets. The USB controller is configured to transfer the packets to the host. The transfer management circuit is coupled between the memory and the USB controller and configured to sequentially read the packets from the memory and sequentially transfer the packets to the USB controller, and to perform the following operations: ending the data transfer when a stored content of the memory does not meet a condition for continuing packet transfer; or ending the data transfer when a last transferred packet meets a preset condition and a next packet that follows the last transferred packet does not meet the preset condition.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: January 4, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Er-Zih Wong, Zhen-Ting Huang, Shih-Chiang Chu, Sung-Kao Liu, Chia-Yi Chang
  • Publication number: 20210374082
    Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.
    Type: Application
    Filed: January 27, 2021
    Publication date: December 2, 2021
    Inventors: Cheng-Yuan HSIAO, Sung-Kao LIU, Wei-Hung CHUANG, Li-Chiao HUNG, Hung-Tai CHEN
  • Patent number: 11126233
    Abstract: A circuit includes: a first interface circuit supporting multiple first interface operating modes respectively corresponding to different versions of a first data transmission protocol; a second interface circuit supporting multiple second interface operating modes respectively corresponding to different versions of a second data transmission protocol; a control circuit configured to operably instruct the first interface circuit to operate in a first target operating mode selected from the multiple first interface operating modes, and configured to operably instruct the second interface circuit to operate in a second target operating mode selected from the multiple second interface operating modes; wherein a difference between a nominal data rate of the first target operating mode and a nominal data rate of the second target operating mode is less than a predetermined threshold.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 21, 2021
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi Ting Chien, Cheng Yuan Hsiao, Chih Yu Hsu, Sung Kao Liu, Wei Hung Chuang
  • Publication number: 20210048859
    Abstract: A circuit includes: a first interface circuit supporting multiple first interface operating modes respectively corresponding to different versions of a first data transmission protocol; a second interface circuit supporting multiple second interface operating modes respectively corresponding to different versions of a second data transmission protocol; a control circuit configured to operably instruct the first interface circuit to operate in a first target operating mode selected from the multiple first interface operating modes, and configured to operably instruct the second interface circuit to operate in a second target operating mode selected from the multiple second interface operating modes; wherein a difference between a nominal data rate of the first target operating mode and a nominal data rate of the second target operating mode is less than a predetermined threshold.
    Type: Application
    Filed: July 15, 2020
    Publication date: February 18, 2021
    Inventors: Yi Ting CHIEN, Cheng Yuan HSIAO, Chih Yu HSU, Sung Kao LIU, Wei Hung CHUANG
  • Publication number: 20200379833
    Abstract: An error handling method for a transmission interface connecting between a first device and a second device for performing data transmission between the first device and the second device, wherein a connection type between the transmission interface and the first device is a direct interface (DI) and the connection type between the transmission interface and the second device is an indirect interface (II), and the error handling method comprises: when an error is detected at the direct interface, reporting an error event to a host of the first device; when an error is detected at the indirect interface, attempting to handle the error without letting the host discover it; and when the error detected at the indirect interface is determined as unable to be solved, reporting another error event to the host.
    Type: Application
    Filed: December 12, 2019
    Publication date: December 3, 2020
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Publication number: 20200272587
    Abstract: The invention provides a USB device and a data transfer method thereof. The USB device is coupled to a host and transfers at least one packet to the host. The USB device includes a memory, a USB controller, and a transfer management circuit. The memory stores packets. The USB controller is configured to transfer the packets to the host. The transfer management circuit is coupled between the memory and the USB controller and configured to sequentially read the packets from the memory and sequentially transfer the packets to the USB controller, and to perform the following operations: ending the data transfer when a stored content of the memory does not meet a condition for continuing packet transfer; or ending the data transfer when a last transferred packet meets a preset condition and a next packet that follows the last transferred packet does not meet the preset condition.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Inventors: ER-ZIH WONG, ZHEN-TING HUANG, SHIH-CHIANG CHU, SUNG-KAO LIU, CHIA-YI CHANG
  • Patent number: 10684668
    Abstract: A USB interface system capable of automatically adjusting connection speed and power consumption capability and a method thereof are provided. The method includes configuring a slave device to perform a first handshake procedure with a main device, and communicate with the main device by using a first connection specification; detecting a first power-off event by using a slave power detection module; when the first power-off event occurs, recording first power-off information by the memory unit. If the slave device is re-connected to the main device, the slave power detection module is configured to perform a second handshake process with the main device, and determine to re-communicate with the main device in a second connection specification different from the first connection specification according to the first power-off information.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: June 16, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi-Ting Chien, Sung-Kao Liu, Cheng-Yuan Hsiao, Wei-Hung Chuang, Chih-Yu Hsu
  • Publication number: 20200081861
    Abstract: A high speed interface connection method used in a high speed interface connection apparatus configured to electrically couple a host terminal having a first connection interface and a device terminal having a second connection interface is provided that includes the steps outlined below. A maximum supported supply power is requested from the host terminal. A dissipated power required by the device terminal in operation is estimated. A host terminal transmission format of the host terminal and a device terminal transmission format of the device terminal in actual operation are respectively determined according to the maximum supported supply power and the dissipated power such that a device dissipated power of the device terminal under actual operation is not larger than a host supply power of the host terminal under actual operation. Communication is performed according to the host terminal transmission format and the device terminal transmission format.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 12, 2020
    Inventors: Chih-Yu HSU, Sung-Kao LIU, Cheng-Yuan HSIAO, Yi-Ting CHIEN, Wei-Hung CHUANG
  • Publication number: 20200064900
    Abstract: A USB interface system capable of automatically adjusting connection speed and power consumption capability and a method thereof are provided. The method includes configuring a slave device to perform a first handshake procedure with a main device, and communicate with the main device by using a first connection specification; detecting a first power-off event by using a slave power detection module; when the first power-off event occurs, recording first power-off information by the memory unit. If the slave device is re-connected to the main device, the slave power detection module is configured to perform a second handshake process with the main device, and determine to re-communicate with the main device in a second connection specification different from the first connection specification according to the first power-off information.
    Type: Application
    Filed: July 1, 2019
    Publication date: February 27, 2020
    Inventors: YI-TING CHIEN, SUNG-KAO LIU, CHENG-YUAN HSIAO, WEI-HUNG CHUANG, CHIH-YU HSU
  • Patent number: 10551905
    Abstract: A data-transmission-format conversion circuit has a first data transmission interface, a second data transmission interface, and a control circuit. The control circuit is coupled to the first data transmission interface and the second data transmission interface for processing data-format conversions between the first data transmission interface and the second data transmission interface. The control circuit is further used to control the second data transmission interface to switch from a first corresponding power mode to a second corresponding power mode when the first data transmission interface is switched from a first power mode to a second power mode. The control circuit is further used to control the second data transmission interface to switch from the first corresponding power mode to a third corresponding power mode when the first data transmission interface is switched from the first power mode to a third power mode.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 4, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Patent number: 10528500
    Abstract: A data packet processing method comprises: receiving data packet including a key message; analyzing the key message; determining whether the data packet is a high priority data packet or a normal data packet according to a result of analyzing the first key message of the data packet; and executing an Rx high priority interrupt in response to determining that the data packet is the high priority data packet. The Rx high priority interrupt is to immediately transmit an interrupt signal to interrupt receiving of the data packets.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 7, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Jun-Jiang Huang, Lu Xiong, Li He, Chun-Wei Gu, Lu Han, Sung-Kao Liu, Chun-Hao Lin, Xi-Cheng Shan, Guan-Yu Liu
  • Publication number: 20190370197
    Abstract: A data packet processing method comprises: receiving data packet including a key message; analyzing the key message; determining whether the data packet is a high priority data packet or a normal data packet according to a result of analyzing the first key message of the data packet; and executing an Rx high priority interrupt in response to determining that the data packet is the high priority data packet. The Rx high priority interrupt is to immediately transmit an interrupt signal to interrupt receiving of the data packets.
    Type: Application
    Filed: August 24, 2018
    Publication date: December 5, 2019
    Inventors: JUN-JIANG HUANG, LU XIONG, LI HE, CHUN-WEI GU, LU HAN, SUNG-KAO LIU, CHUN-HAO LIN, XI-CHENG SHAN, GUAN-YU LIU