Patents by Inventor Supriya Raveendra HEGDE

Supriya Raveendra HEGDE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411928
    Abstract: An optical element is positioned in a holder over a laser light source. The optical element includes an electrical trace that is coupled between first and second pads. A sensing circuit that is also coupled to the first and second pads performs a voltage/current sensing operation to detect displacement of the optical element and control enablement of the laser light source.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 21, 2023
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventors: Steven COLLINS, Graeme STORM, Supriya Raveendra HEGDE
  • Patent number: 11658518
    Abstract: A wireless power circuit operable in transceiver mode and in Q-factor measurement mode includes a bridge rectifier having first and second inputs coupled to first and second terminals of a coil, and an output coupled to a rectified node. An excitation circuit coupled to the first terminal, in Q-factor measurement mode, drives the coil with a pulsed signal. A protection circuit couples the first terminal to a first node when in Q-factor measurement mode and decouples the first terminal when in transceiver mode. A controller causes the bridge rectifier to short the first and second terminals to ground during Q-factor measurement mode. A sensing circuit amplifies voltage at the first node to produce an output voltage, and in response to the voltage at the first node rising to cross a rising threshold voltage, digitizes the output voltage. The digitized output voltage is used in calculating a Q-factor of the coil.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 23, 2023
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Baranidharan Karuppusamy, Thet Mon Sann, Kien Beng Tan, Supriya Raveendra Hegde, Huiqiao He, Teerasak Lee
  • Patent number: 11495995
    Abstract: A wireless power receiving circuit includes a transistor based rectifier receiving an AC input voltage, and control logic receiving an overvoltage signal. The control logic generates control signals for controlling turn on of transistors within the transistor based rectifier based upon the overvoltage signal so as to cause the transistor based rectifier to produce a rectified output voltage from the AC input voltage. A comparator compares the rectified output voltage to a reference voltage and asserts the overvoltage signal if the rectified output voltage is greater than the reference voltage. In response to assertion of the overvoltage signal, the control logic asserts the control signals to simultaneously turn on all transistors of the transistor based rectifier.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: November 8, 2022
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra Hegde, Chee Weng Cheong
  • Patent number: 11408923
    Abstract: A receiver circuit includes a rectifier operable in full-, half-synchronous and asynchronous modes. A measurement circuit, with method, provides for real-time power measurement within the rectifier. The measurements are made based on the average output current from the rectifier delivered to the load and measurements sampled over time of the instantaneous voltage at each input/output node of the rectifier. Equivalent resistance in the rectifier is determined from the measurements and power dissipation calculated from the determined equivalent resistance and the average output current. The instantaneous voltages are synchronously captured through high-voltage AC coupling in order to detect the voltage drop across each element of the rectifier. The sensed voltages are amplified in the low voltage domain and converted by a high-speed analog-to-digital converter in order to produce data useful in computing equivalent resistance values.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 9, 2022
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Yannick Guedon, Teerasak Lee, Supriya Raveendra Hegde
  • Publication number: 20220103019
    Abstract: A wireless power circuit operable in transceiver mode and in Q-factor measurement mode includes a bridge rectifier having first and second inputs coupled to first and second terminals of a coil, and an output coupled to a rectified node. An excitation circuit coupled to the first terminal, in Q-factor measurement mode, drives the coil with a pulsed signal. A protection circuit couples the first terminal to a first node when in Q-factor measurement mode and decouples the first terminal when in transceiver mode. A controller causes the bridge rectifier to short the first and second terminals to ground during Q-factor measurement mode. A sensing circuit amplifies voltage at the first node to produce an output voltage, and in response to the voltage at the first node rising to cross a rising threshold voltage, digitizes the output voltage. The digitized output voltage is used in calculating a Q-factor of the coil.
    Type: Application
    Filed: August 23, 2021
    Publication date: March 31, 2022
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Baranidharan KARUPPUSAMY, Thet Mon SANN, Kien Beng TAN, Supriya Raveendra HEGDE, Huiqiao HE, Teerasak LEE
  • Patent number: 11271393
    Abstract: A wireless-power-system includes a bridge-rectifier having first and second inputs coupled to first and second terminals of a coil, and an output coupled to a rectified voltage node. An excitation circuit is coupled to the first input. A protection circuit has a first connection node capacitively coupled to the first terminal. The protection circuit, in Q-factor measurement mode, clamps the first connection node when the first input is coupled to ground, and connects the first connection node to the rectified voltage node when the first input is coupled to a supply voltage. The protection circuit, in wireless power mode, is acting as one leg of the rectifier. A pass gate circuit is coupled between the first connection node and a sense node, and a sensing circuit is coupled to the sense node and measures a Q-factor of the wireless power system when the protection circuit is in Q-factor measurement mode.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 8, 2022
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra Hegde, Yannick Guedon, Huiqiao He
  • Publication number: 20220069570
    Abstract: A wireless-power-system includes a bridge-rectifier having first and second inputs coupled to first and second terminals of a coil, and an output coupled to a rectified voltage node. An excitation circuit is coupled to the first input. A protection circuit has a first connection node capacitively coupled to the first terminal. The protection circuit, in Q-factor measurement mode, clamps the first connection node when the first input is coupled to ground, and connects the first connection node to the rectified voltage node when the first input is coupled to a supply voltage. The protection circuit, in wireless power mode, is acting as one leg of the rectifier. A pass gate circuit is coupled between the first connection node and a sense node, and a sensing circuit is coupled to the sense node and measures a Q-factor of the wireless power system when the protection circuit is in Q-factor measurement mode.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 3, 2022
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra HEGDE, Yannick GUEDON, Huiqiao HE
  • Patent number: 11251691
    Abstract: A high-side switching transistor of a rectifier circuit is driven by a high-side driver circuit to supply current to an output node. The high-side driver circuit is powered between a capacitive bootstrap node and the output node. A boot charge circuit charges the bootstrap capacitor by supplying current to the bootstrap node. The boot charge circuit includes: a first current path that selectively supplies a first charging current to the bootstrap node when the rectifier circuit is operating in a switching mode; and a second current path that selectively supplies a second charging current to the bootstrap node when the rectifier circuit is operating in a reset mode.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: February 15, 2022
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra Hegde, Yannick Guedon
  • Patent number: 11152822
    Abstract: A wireless-power-circuit is operable in transceiver-mode and Q-factor-measurement-mode, and includes a bridge coupled to a coil, and having an output coupled to a rectified-voltage node. An excitation circuit, when in Q-factor-measurement-mode, drives the coil with a pulsed signal. A protection circuit couples the coil to a first node when in Q-factor-measurement-mode and decouples the coil from the first node when in transceiver-mode. A Q-factor sensing circuit includes an amplifier having inputs coupled to the first node and a common mode voltage (Vcm), and generating an output signal having an output voltage. A comparator generates a comparison output indicating Vcm crossing of a voltage at the first terminal of the coil, a processing circuit generating an enable signal based upon the comparison output, and an analog-to-digital-converter, when enabled, digitizing the output voltage for use in calculating a Q-factor of the coil.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: October 19, 2021
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Baranidharan Karuppusamy, Thet Mon Sann, Kien Beng Tan, Supriya Raveendra Hegde, Huiqiao He, Teerasak Lee
  • Publication number: 20210091655
    Abstract: A high-side switching transistor of a rectifier circuit is driven by a high-side driver circuit to supply current to an output node. The high-side driver circuit is powered between a capacitive bootstrap node and the output node. A boot charge circuit charges the bootstrap capacitor by supplying current to the bootstrap node. The boot charge circuit includes: a first current path that selectively supplies a first charging current to the bootstrap node when the rectifier circuit is operating in a switching mode; and a second current path that selectively supplies a second charging current to the bootstrap node when the rectifier circuit is operating in a reset mode.
    Type: Application
    Filed: September 3, 2020
    Publication date: March 25, 2021
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra HEGDE, Yannick GUEDON
  • Publication number: 20210088567
    Abstract: A receiver circuit includes a rectifier operable in full-, half-synchronous and asynchronous modes. A measurement circuit, with method, provides for real-time power measurement within the rectifier. The measurements are made based on the average output current from the rectifier delivered to the load and measurements sampled over time of the instantaneous voltage at each input/output node of the rectifier. Equivalent resistance in the rectifier is determined from the measurements and power dissipation calculated from the determined equivalent resistance and the average output current. The instantaneous voltages are synchronously captured through high-voltage AC coupling in order to detect the voltage drop across each element of the rectifier. The sensed voltages are amplified in the low voltage domain and converted by a high-speed analog-to-digital converter in order to produce data useful in computing equivalent resistance values.
    Type: Application
    Filed: September 10, 2020
    Publication date: March 25, 2021
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Yannick GUEDON, Teerasak LEE, Supriya Raveendra HEGDE
  • Publication number: 20210091597
    Abstract: A wireless power receiving circuit includes a transistor based rectifier receiving an AC input voltage, and control logic receiving an overvoltage signal. The control logic generates control signals for controlling turn on of transistors within the transistor based rectifier based upon the overvoltage signal so as to cause the transistor based rectifier to produce a rectified output voltage from the AC input voltage. A comparator compares the rectified output voltage to a reference voltage and asserts the overvoltage signal if the rectified output voltage is greater than the reference voltage. In response to assertion of the overvoltage signal, the control logic asserts the control signals to simultaneously turn on all transistors of the transistor based rectifier.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 25, 2021
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Supriya Raveendra HEGDE, Chee Weng CHEONG
  • Patent number: 10790791
    Abstract: A feedback stage for an integrator circuit is provided. The integrator receives a first input current and a second input current that include respective measurement current components and an offset current component. The integrator integrates the first input current and the second input current and generates a first output voltage and a second output voltage. The feedback stage including a transconductance amplifier detects a difference between the first output voltage and the second output voltage and sinks or sources a first output current and a second output current based on the difference between the first output voltage and the second output voltage. The first output current is additively combined with the first input current and the second output current is additively combined with the second input current to mitigate the offset current component at an input of the integrator.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: September 29, 2020
    Assignee: STMicroelectronics Asia Pacific PTE Ltd
    Inventors: Supriya Raveendra Hegde, Hugo Gicquel
  • Publication number: 20200153399
    Abstract: A feedback stage for an integrator circuit is provided. The integrator receives a first input current and a second input current that include respective measurement current components and an offset current component. The integrator integrates the first input current and the second input current and generates a first output voltage and a second output voltage. The feedback stage including a transconductance amplifier detects a difference between the first output voltage and the second output voltage and sinks or sources a first output current and a second output current based on the difference between the first output voltage and the second output voltage. The first output current is additively combined with the first input current and the second output current is additively combined with the second input current to mitigate the offset current component at an input of the integrator.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 14, 2020
    Inventors: Supriya Raveendra HEGDE, Hugo GICQUEL