Patents by Inventor Surya Pratik Saha

Surya Pratik Saha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimization-aware incremental synthesis
    Patent number: 10839118
    Abstract: A circuit design is partitioned into a plurality of partitions during a first synthesis by a computer processor. After modification of the circuit design, the computer processor determines changed partitions and unchanged partitions of the circuit design. The computer processor then determines dependent partitions of the changed partitions. The changed partitions and the dependent partitions are re-synthesized by the computer processor into respective re-synthesized partitions, and the computer processor then combines the respective re-synthesized partitions and the unchanged partitions into a complete synthesized circuit design in a memory.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: November 17, 2020
    Assignee: Xilinx, Inc.
    Inventors: Kameshwar Chandrasekar, Aman Gayasen, Manpreet Singh, Surya Pratik Saha, Sanjay Saha
  • Incremental synthesis for changes to a circuit design
    Patent number: 10586005
    Abstract: Incremental synthesis for changes to a circuit design can include synthesizing, using computer hardware, a first circuit design resulting in a partitioning of the first circuit design and a plurality of synthesized partitions of the first circuit design and, for a second circuit design that is a modified version of the first circuit design and based upon the partitioning of the first circuit design, determining, using the computer hardware, a partition of the second circuit design that differs from the first circuit design. The partition of the second circuit design can be technology mapped using the computer hardware resulting in a synthesized partition of the second circuit design.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: March 10, 2020
    Assignee: XILINX, INC.
    Inventors: Kameshwar Chandrasekar, Surya Pratik Saha, Aman Gayasen, Sumanta Datta
  • Parallelizing timing-based operations for circuit designs
    Patent number: 10303833
    Abstract: Parallelizing operations for implementing a circuit design can include dividing, using a processor, the circuit design into a plurality of partitions, wherein each partition is stored as a separate file, for each partition, generating, using the processor, a timing arc file specifying boundary delays for the partition, and generating, using the processor, a partition design file specifying interfaces of the partitions. Using the processor, a plurality of processes executing in parallel can be initiated. Each process is adapted to operate on a selected partition using the partition design file and the timing arc files for the other partitions to generate an updated file for the selected partition.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: May 28, 2019
    Assignee: XILINX, INC.
    Inventors: Aman Gayasen, Surya Pratik Saha, Elliott Delaye, Shangzhi Sun, Ashish Sirasao