Patents by Inventor Suryanarayana Murthy Durbhakula

Suryanarayana Murthy Durbhakula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10810142
    Abstract: Apparatuses and method for an integrated circuit device are described. In an apparatus thereof, there is a plurality of memory controllers coupled to a plurality of memory banks. A network of switches is coupled to the plurality of memory controllers. A plurality of data processing devices is coupled to the network of switches and is configured to generate memory requests. A network controller is coupled to the network of switches and is configured to queue the memory requests and selectively issue requests to memory from the memory requests queued responsive to corresponding response times associated with the plurality of memory banks.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: October 20, 2020
    Assignee: XILINX, INC.
    Inventor: Suryanarayana Murthy Durbhakula
  • Publication number: 20180329839
    Abstract: Apparatuses and method for an integrated circuit device are described. In an apparatus thereof, there is a plurality of memory controllers coupled to a plurality of memory banks. A network of switches is coupled to the plurality of memory controllers. A plurality of data processing devices is coupled to the network of switches and is configured to generate memory requests. A network controller is coupled to the network of switches and is configured to queue the memory requests and selectively issue requests to memory from the memory requests queued responsive to corresponding response times associated with the plurality of memory banks.
    Type: Application
    Filed: May 15, 2017
    Publication date: November 15, 2018
    Applicant: Xilinx, Inc.
    Inventor: Suryanarayana Murthy Durbhakula
  • Patent number: 9304927
    Abstract: The disclosed embodiments relate to a method for dynamically changing a prefetching configuration in a computer system, wherein the prefetching configuration specifies how to change an ahead distance that specifies how many references ahead to prefetch for each stream. During operation of the computer system, the method keeps track of one or more stream lengths, wherein a stream is a sequence of memory references with a constant stride. Next, the method dynamically changes the prefetching configuration for the computer system based on observed stream lengths in a most-recent window of time.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: April 5, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Suryanarayana Murthy Durbhakula, Yuan C. Chou
  • Publication number: 20140059299
    Abstract: The disclosed embodiments relate to a method for dynamically changing a prefetching configuration in a computer system, wherein the prefetching configuration specifies how to change an ahead distance that specifies how many references ahead to prefetch for each stream. During operation of the computer system, the method keeps track of one or more stream lengths, wherein a stream is a sequence of memory references with a constant stride. Next, the method dynamically changes the prefetching configuration for the computer system based on observed stream lengths in a most-recent window of time.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 27, 2014
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Suryanarayana Murthy Durbhakula, Yuan C. Chou