Patents by Inventor Susumu Nagayama

Susumu Nagayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4786607
    Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processsing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.
    Type: Grant
    Filed: September 4, 1987
    Date of Patent: November 22, 1988
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shumpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
  • Patent number: 4725558
    Abstract: An improved semiconductor defects curing method and apparatus are disclosed which is free from current leakage due to pin-holes or other defects. Also an improved method for processing a semiconductor device is shown. According to the invention, the gaps or holes in the semiconductor layer produced in the fabrication process are filled with insulator in advance of deposition of electrodes.
    Type: Grant
    Filed: November 6, 1986
    Date of Patent: February 16, 1988
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
  • Patent number: 4713518
    Abstract: In a method of making an electronic device having at least a transparent conductive layer, which includes at least a step of forming a transparent conductive layer member and a step of forming a transparent conductive layer by patterning the transparent conductive layer member using a spot-shaped or linear laser beam or beams, each of which has a short wavelength of 400 nm or less and optical energy greater than the optical energy band gap of the transparent conductive layer.
    Type: Grant
    Filed: June 3, 1985
    Date of Patent: December 15, 1987
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenji Itoh, Susumu Nagayama
  • Patent number: 4706376
    Abstract: A method for manufacturing a semiconductor photoelectric conversion device including forming a first impurity doped non-single crystal semiconductor layer of a first conductivity type on a substrate; forming an intrinsic non-single crystal semiconductor layer on the first semiconductor layer; forming a second impurity doped non-single crystal second conductivity layer type opposite to the first conductivity type on the intrinsic layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the second impurity doped layer; irradiating the outer surface of the second impurity doped semiconductor layer with light energy of suitable wavelength which is effective to selectively crystallize the intrinsic semiconductor layer, whereby only the portion of the intrinsic semiconductor layer adjacent the impurity doped semiconductor layer is crystallized.
    Type: Grant
    Filed: November 18, 1986
    Date of Patent: November 17, 1987
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shumpei Yamazaki, Susumu Nagayama
  • Patent number: 4704624
    Abstract: A semiconductor photoelectric conversion device comprises a first non-single crystal semiconductor layer of a first conductivity type. A second non-single crystal semiconductor layer of substantially an intrinsic conductivity type is formed on the first semiconductor layer; the second layer comprises a first crystallized region and a second crystallized region. The second crystallized region has a similar crystalline structure as that of the first semiconductor layer and extends from the first semiconductor layer toward the first crystallized region where the degree of crystallization of the first crystallized region is less than that of the second crystallized region. A third non-single crystal semiconductor layer of a second semiconductor type opposite to said first conductivity type is formed on the intrinsic layer.
    Type: Grant
    Filed: April 22, 1985
    Date of Patent: November 3, 1987
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Susumu Nagayama
  • Patent number: 4680855
    Abstract: An electronic device manufacturing method including a step of forming a layer member to be patterned, which is a conductive metal layer member, a laminate member of a transparent conductive layer and a non-transparent or reflective layer or a non-single-crystal semiconductor layer member, and a step of scanning the layer member by a spot-shaped laser beam or exposing the layer member to radiation by one or more linear pulsed laser beams, thereby forming the patterned layer.
    Type: Grant
    Filed: October 28, 1985
    Date of Patent: July 21, 1987
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenji Itoh, Susumu Nagayama