Patents by Inventor Susumu Ooki
Susumu Ooki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200303438Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus capable of suppressing an adverse effect of high-order light of diffracted light on image quality. A glass plate material is bonded to a semiconductor substrate on which a pixel region in which a plurality of pixels is arranged is formed so that a gap is not provided between the glass plate material and the pixel region, and a low refractive index layer having a refractive index lower than that of the glass substrate is arranged on a resin layer between a low reflection film formed on a front surface of an on-chip lens arranged for every pixel and the glass plate material. The low refractive index layer is formed by a hole layer that includes a plurality of fine holes having a diameter smaller than a pitch of the pixels and a film that is formed so as to close the plurality of fine holes as hollows.Type: ApplicationFiled: September 25, 2018Publication date: September 24, 2020Inventor: SUSUMU OOKI
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Patent number: 10784293Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.Type: GrantFiled: September 14, 2018Date of Patent: September 22, 2020Assignee: Sony CorporationInventors: Susumu Ooki, Masashi Nakata
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Publication number: 20190019823Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.Type: ApplicationFiled: September 14, 2018Publication date: January 17, 2019Applicant: SONY CORPORATIONInventors: Susumu OOKI, Masashi NAKATA
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Patent number: 10128285Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs.Type: GrantFiled: January 23, 2017Date of Patent: November 13, 2018Assignee: Sony CorporationInventors: Susumu Ooki, Masashi Nakata
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Publication number: 20170162618Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.Type: ApplicationFiled: January 23, 2017Publication date: June 8, 2017Inventors: Susumu OOKI, Masashi NAKATA
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Patent number: 9577012Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.Type: GrantFiled: July 12, 2013Date of Patent: February 21, 2017Assignee: Sony CorporationInventors: Susumu Ooki, Masashi Nakata
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Patent number: 9294691Abstract: An imaging device includes: plural photoelectric conversion device layers in which photoelectric conversion devices performing photoelectric conversion of incident light are formed; and a wiring layer sandwiched by respective photoelectric conversion device layers, in which wirings for reading charges from the photoelectric conversion devices are formed.Type: GrantFiled: August 29, 2012Date of Patent: March 22, 2016Assignee: SONY CORPORATIONInventor: Susumu Ooki
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Publication number: 20150171146Abstract: The present disclosure relates to an imaging element, an electronic device, and an information processing device capable of more easily providing a wider variety of photoelectric conversion outputs. An imaging element of the present disclosure includes: a photoelectric conversion element layer containing a photoelectric conversion element that photoelectrically converts incident light; a wiring layer formed in the photoelectric conversion element layer on the side opposite to a light entering plane of the incident light, and containing a wire for reading charges from the photoelectric conversion element; and a support substrate laminated on the photoelectric conversion element layer and the wiring layer, and containing another photoelectric conversion element. The present disclosure is applicable to an imaging element, an electronic device, and an information processing device.Type: ApplicationFiled: July 12, 2013Publication date: June 18, 2015Inventors: Susumu Ooki, Masashi Nakata
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Patent number: 8817164Abstract: An imaging device includes a basic cell having two or more the pixels that share floating diffusion. The imaging device also includes a transistor shared by the two or more pixels in the basic cell and arranged on the outside of the two or more pixels. The imaging device further includes a light receiving unit connected to the floating diffusion shared by the pixels in the basic cell through a transfer gate. In the imaging device, on-chip lenses are arranged substantially at regular intervals. Also, an optical waveguide is formed so that the position thereof in the surface of the solid-state imaging device is located at a position shifted from the center of the light receiving unit to the transistor and in the inside of the light receiving unit and the inside of the on-chip lens.Type: GrantFiled: January 31, 2013Date of Patent: August 26, 2014Assignee: Sony CorporationInventors: Hiroshi Tayanaka, Susumu Ooki, Junichi Furukawa, Fumiaki Okazaki
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Publication number: 20130234220Abstract: An imaging device includes a basic cell having two or more the pixels that share floating diffusion. The imaging device also includes a transistor shared by the two or more pixels in the basic cell and arranged on the outside of the two or more pixels. The imaging device further includes a light receiving unit connected to the floating diffusion shared by the pixels in the basic cell through a transfer gate. In the imaging device, on-chip lenses are arranged substantially at regular intervals. Also, an optical waveguide is formed so that the position thereof in the surface of the solid-state imaging device is located at a position shifted from the center of the light receiving unit to the transistor and in the inside of the light receiving unit and the inside of the on-chip lens.Type: ApplicationFiled: January 31, 2013Publication date: September 12, 2013Applicant: SONY CORPORATIONInventors: Hiroshi Tayanaka, Susumu Ooki, Junichi Furukawa, Fumiaki Okazaki
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Patent number: 8431880Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.Type: GrantFiled: January 12, 2012Date of Patent: April 30, 2013Assignee: Sony CorporationInventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
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Publication number: 20130057699Abstract: An imaging device includes: plural photoelectric conversion device layers in which photoelectric conversion devices performing photoelectric conversion of incident light are formed; and a wiring layer sandwiched by respective photoelectric conversion device layers, in which wirings for reading charges from the photoelectric conversion devices are formed.Type: ApplicationFiled: August 29, 2012Publication date: March 7, 2013Applicant: SONY CORPORATIONInventor: Susumu Ooki
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Patent number: 8390726Abstract: An imaging device includes a basic cell having two or more the pixels that share floating diffusion. The imaging device also includes a transistor shared by the two or more pixels in the basic cell and arranged on the outside of the two or more pixels. The imaging device further includes a light receiving unit connected to the floating diffusion shared by the pixels in the basic cell through a transfer gate. In the imaging device, on-chip lenses are arranged substantially at regular intervals. Also, an optical waveguide is formed so that the position thereof in the surface of the solid-state imaging device is located at a position shifted from the center of the light receiving unit to the transistor and in the inside of the light receiving unit and the inside of the on-chip lens.Type: GrantFiled: March 22, 2010Date of Patent: March 5, 2013Assignee: Sony CorporationInventors: Hiroshi Tayanaka, Susumu Ooki, Junichi Furukawa, Fumiaki Okazaki
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Patent number: 8211733Abstract: A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.Type: GrantFiled: August 11, 2010Date of Patent: July 3, 2012Assignee: Sony CorporationInventors: Maki Sato, Susumu Ooki
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Publication number: 20120104479Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.Type: ApplicationFiled: January 12, 2012Publication date: May 3, 2012Applicant: SONY CORPORATIONInventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
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Patent number: 8115154Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.Type: GrantFiled: July 27, 2009Date of Patent: February 14, 2012Assignee: Sony CorporationInventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki
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Publication number: 20100330724Abstract: A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.Type: ApplicationFiled: August 11, 2010Publication date: December 30, 2010Applicant: SONY CORPORATIONInventors: MAKI SATO, SUSUMU OOKI
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Publication number: 20100245648Abstract: An imaging device includes a basic cell having two or more the pixels that share floating diffusion. The imaging device also includes a transistor shared by the two or more pixels in the basic cell and arranged on the outside of the two or more pixels. The imaging device further includes a light receiving unit connected to the floating diffusion shared by the pixels in the basic cell through a transfer gate. In the imaging device, on-chip lenses are arranged substantially at regular intervals. Also, an optical waveguide is formed so that the position thereof in the surface of the solid-state imaging device is located at a position shifted from the center of the light receiving unit to the transistor and in the inside of the light receiving unit and the inside of the on-chip lens.Type: ApplicationFiled: March 22, 2010Publication date: September 30, 2010Applicant: SONY CORPORATIONInventors: Hiroshi Tayanaka, Susumu Ooki, Junichi Furukawa, Fumiaki Okazaki
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Patent number: 7795655Abstract: There is provided a solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.Type: GrantFiled: September 27, 2007Date of Patent: September 14, 2010Assignee: Sony CorporationInventors: Maki Sato, Susumu Ooki
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Publication number: 20100025569Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.Type: ApplicationFiled: July 27, 2009Publication date: February 4, 2010Applicant: SONY CORPORATIONInventors: Takuji Matsumoto, Tetsuji Yamaguchi, Keiji Tatani, Yutaka Nishimura, Kazuichiro Itonaga, Hiroyuki Mori, Norihiro Kubo, Fumihiko Koga, Shinichiro Izawa, Susumu Ooki