Patents by Inventor Swee Kah Lee

Swee Kah Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10886199
    Abstract: A method of producing a molded semiconductor package includes: attaching a first load terminal at a first side of a semiconductor die to a leadframe, the semiconductor die having a second load terminal at a second side opposite the first side and a control terminal at the first side or the second side; encapsulating the semiconductor die in a laser-activatable mold compound so that the leadframe is at least partly exposed from the laser-activatable mold compound at a first side of the molded semiconductor package, and the second load terminal is at least partly exposed from the laser-activatable mold compound at a second side of the molded semiconductor package opposite the first side; and laser activating a first region of the laser-activatable mold compound to form a first laser-activated region which forms part of an electrical connection to the second load terminal.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: January 5, 2021
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Swee Kah Lee, Josef Maerz, Thomas Stoek, Chee Voon Tan
  • Publication number: 20200381380
    Abstract: Embodiments of molded packages and corresponding methods of manufacture are provided. In an embodiment of a molded package, the molded package includes a laser-activatable mold compound having a plurality of laser-activated regions which are plated with an electrically conductive material to form metal pads and/or metal traces at a first side of the laser-activatable mold compound. A semiconductor die embedded in the laser-activatable mold compound has a plurality of die pads. An interconnect electrically connects the plurality of die pads of the semiconductor die to the metal pads and/or metal traces at the first side of the laser-activatable mold compound.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 3, 2020
    Inventors: Chee Hong Lee, Kok Yau Chua, Chii Shang Hong, Swee Kah Lee, Chee Yang Ng, Klaus Schiess
  • Publication number: 20200343167
    Abstract: A semiconductor package includes a mold compound, a plurality of electrically conductive leads at least some of which transition from a first level within the mold compound to a second (different) level outside the mold compound, and a semiconductor die embedded in the mold compound and attached to the plurality of electrically conductive leads in a flip-chip configuration. One or more leads of the plurality of electrically conductive leads includes a first section terminating at a side face of the mold compound or protruding from the side face with a first end positioned outside a footprint of the mold compound and which terminates at the second level, and a second section embedded in the mold compound and having a second end which is positioned under the semiconductor die and exposed at a bottom side of the semiconductor package. Corresponding methods of manufacture are also described.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 29, 2020
    Inventors: Nurfarena Othman, Do Hyung Kim, Swee Kah Lee, Mohd Rasydan Hakam Mohamad Tahir, Muhammad Muhammat Sanusi, Ciprian Mircea Pavaluta
  • Publication number: 20200291538
    Abstract: A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 ?m to 10 ?m. A method of manufacturing a metal surface with such micropores also is described.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 17, 2020
    Inventors: Norbert Pielmeier, Chin Yung Lai, Swee Kah Lee, Muhammad Muhammat Sanusi, Evelyn Napetschnig, Nurfarena Othman, Siew Ching Seah
  • Publication number: 20200051898
    Abstract: In an embodiment, a leadframe includes a first electrically conductive part and a second electrically conductive part, each having an outer surface arranged to provide substantially coplanar outer contact areas having a footprint and an inner surface opposing the outer surface, the first part being spaced apart from the second part by a gap, a first recess arranged in the inner surface of the first part, a second recess arranged in the inner surface of the second part, and a first electrically conductive insert that is arranged in, and extends between, the first recess and the second recess and bridges the gap between the first part and the second part.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 13, 2020
    Inventors: Chau Fatt Chiang, Paul Armand Asentista Calo, Kok Yau Chua, Josef Hoeglauer, Swee Kah Lee, Khay Chwan Saw
  • Publication number: 20200048075
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: October 22, 2019
    Publication date: February 13, 2020
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Publication number: 20200006267
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 10501312
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: December 10, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Publication number: 20190341324
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Patent number: 10431560
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: October 1, 2019
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 10396007
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Patent number: 10304780
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: May 28, 2019
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Valentyn Solomko
  • Publication number: 20190023561
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 10163812
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: December 25, 2018
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Valentyn Solomko
  • Publication number: 20180308804
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Application
    Filed: July 2, 2018
    Publication date: October 25, 2018
    Applicant: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang NG, Valentyn Solomko
  • Patent number: 10099411
    Abstract: A mold injection tool includes a first mold plate having first and second columns of mold cavities, each of the cavities and a first cull block arranged between the first and second columns. A plurality of first channel sections is formed between an adjacent pair of mold cavities. Each of the first channel sections are configured to guide liquefied molding material from the first cull block into the adjacent pair of mold cavities in the first and second columns. The mold injection tool further includes a second mold plate having similarly configured mold cavities, cull block, and channel section. Adjacent ones of the first and second channel sections form a contained chamber when the first and second mold plates are pressed together. The mold plates are configured to inject liquefied molding material through an entrance that is in open communication with each contained chamber.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: October 16, 2018
    Assignee: Infineon Technologies AG
    Inventors: Choon Huey Wang, Chau Fatt Chiang, Swee Kah Lee, Chee Hong Fang
  • Publication number: 20180108616
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Application
    Filed: October 19, 2016
    Publication date: April 19, 2018
    Applicant: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang NG, Valentyn Solomko
  • Publication number: 20180033752
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 9868632
    Abstract: A base plate with a first side having an elevated portion, a recessed portion laterally surrounding the elevated portion, and a vertical face extending from the recessed portion to the elevated portion is provided. At least a part of the vertical face is covered with a metal layer. A mold compound structure is formed on the first side with the metal layer disposed between the first side and the mold compound structure such that the mold compound structure includes an elevated portion laterally surrounding a recessed portion, and opposing edge faces that vertically extend from the recessed portion to the elevated portion. At least a part of the base plate is subsequently removed such that the recessed portion of the mold compound structure is uncovered from the base plate and such that the metal layer remains on at least one uncovered section of the mold compound structure.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 16, 2018
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Horst Theuss
  • Patent number: 9852918
    Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: December 26, 2017
    Assignee: Infineon Technologies AG
    Inventors: Peh Hean Teh, Jagen Krishnan, Swee Kah Lee, Poh Cheng Lim, Joachim Mahler, Chew Theng Tai, Yik Yee Tan, Soon Lock Goh