Patents by Inventor Sylvain Leomant

Sylvain Leomant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170170274
    Abstract: A semiconductor device includes a first gate trench and a second gate trench in a first main surface of a semiconductor substrate. A mesa is arranged between the first gate trench and the second gate trench. The mesa separates the first gate trench from the second gate trench. Each of the first and second gate trenches includes first sections extending in a first direction and second sections connecting adjacent ones of the first sections. The second sections of the first gate trench are disposed opposite to the second sections of the second gate trench with respect to a plane perpendicular to the first direction.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 15, 2017
    Inventors: Britta Wutte, Sylvain Leomant
  • Publication number: 20170047324
    Abstract: A method of manufacturing an integrated circuit includes: growing an epitaxial layer on a process surface of a base substrate; forming, by processes applied to an exposed first surface of the epitaxial layer, first transistor cells in the epitaxial layer, each first transistor cell including a first gate electrode; and forming, by processes applied to a surface opposite to the first surface, second transistor cells, each second transistor cell including a second gate electrode.
    Type: Application
    Filed: October 27, 2016
    Publication date: February 16, 2017
    Inventors: Sylvain Léomant, Martin Vielemeyer
  • Patent number: 9530773
    Abstract: Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: December 27, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Vielemeyer, Sylvain Leomant, Milko Paolucci, Martin Poelzl
  • Patent number: 9502401
    Abstract: An integrated circuit includes a first switching device including a first semiconductor region in a first section of a semiconductor portion and a second switching device including a second semiconductor region in a second section of the semiconductor portion. The first and second sections as well as electrode structures of the first and second switching devices outside the semiconductor portion are arranged along a vertical axis perpendicular to a first surface of the semiconductor portion.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: November 22, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Sylvain Léomant, Martin Vielemeyer
  • Publication number: 20160043072
    Abstract: Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.
    Type: Application
    Filed: October 20, 2015
    Publication date: February 11, 2016
    Inventors: Martin Vielemeyer, Sylvain Leomant, Milko Paolucci, Martin Poelzl
  • Patent number: 9171738
    Abstract: Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 27, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Vielemeyer, Sylvain Leomant, Milko Paolucci, Martin Poelzl
  • Publication number: 20150048420
    Abstract: An integrated circuit includes a first switching device including a first semiconductor region in a first section of a semiconductor portion and a second switching device including a second semiconductor region in a second section of the semiconductor portion. The first and second sections as well as electrode structures of the first and second switching devices outside the semiconductor portion are arranged along a vertical axis perpendicular to a first surface of the semiconductor portion.
    Type: Application
    Filed: August 16, 2013
    Publication date: February 19, 2015
    Inventors: Sylvain Léomant, Martin Vielemeyer
  • Publication number: 20140167069
    Abstract: Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 19, 2014
    Inventors: Martin Vielemeyer, Sylvain Leomant, Milko Paolucci, Martin Poelzl
  • Patent number: 8004924
    Abstract: A circuit includes a first negative feed back loop coupled to a virtual Vvdd power rail and a true Vdd power rail. A second negative feed back loop is coupled to the virtual Vvss power rail and a true Vss power rail. The virtual rail to virtual rail voltage difference is regulated at the highest threshold voltage between pull-up and pull-down transistors of a memory cell.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: August 23, 2011
    Assignee: Atmel Corporation
    Inventors: Sylvain Leomant, Jimmy Fort, Arnaud Turier, Laurent Vachez, Lotfi B. Ammar
  • Publication number: 20100208539
    Abstract: A circuit includes a first negative feed back loop coupled to a virtual Vvdd power rail and a true Vdd power rail. A second negative feed back loop is coupled to the virtual Vvss power rail and a true Vss power rail. The virtual rail to virtual rail voltage difference is regulated at the highest threshold voltage between pull-up and pull-down transistors of a memory cell.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 19, 2010
    Applicant: Atmel Corporation
    Inventors: Sylvain Leomant, Jimmy Fort, Arnaud Turier, Laurent Vachez, Lotfi Ben Ammar