Abstract: A semiconductor device and method of manufacture thereof having a less free fluorine (F) fluorine containing Silica Glass (FSG) dielectric film formed thereon. The FSG dielectric film includes about 25% or less free F, has a porosity of about 5% or less and has a dielectric constant of about 3.8 or less. A first barrier layer may be disposed between a workpiece and the FSG dielectric film, and a second barrier layer may be disposed between the FSG dielectric film and at least one conductive line formed in the FSG dielectric film. The FSG dielectric film is formed by introducing SiF4:SiH4 at a reaction condition ratio of about 2.5 or less at a pressure of about 3 Torr or less and at an RF of about 500 watts to 5000 watts.

Abstract: A system and method for detecting chamber leakage by measuring the reflectivity of an oxidized thin film. In a preferred embodiment, a method of detecting leaks in a chamber includes providing a first monitor workpiece, placing the first monitor workpiece in the chamber, and forming at least one film on the first monitor workpiece. The reflectivity of the least one film of the first monitor workpiece is measured, wherein the reflectivity indicates whether there are leaks in the at least one seal of the chamber. In another embodiment, the method includes providing a second monitor workpiece, placing the second monitor workpiece in the chamber, and forming at least one film on the second monitor workpiece. The reflectivity of the at least one film of the second monitor workpiece is measured, and the second monitor workpiece film reflectivity is compared to the first monitor workpiece film reflectivity.

Abstract: A method for fabricating a dielectric layer provides for use of a carbon source material separate from a halogen source material when forming a carbon and halogen doped silicate glass dielectric layer. The use of separate carbon and halogen source materials provides enhanced process latitude when forming the carbon and halogen doped silicate glass dielectric layer. Such a carbon and halogen doped silicate glass dielectric layer having a dielectric constant greater than about 3.0 is particularly useful as an intrinsic planarizing stop layer within a damascene method. A bilayer dielectric layer construction comprising a carbon and halogen doped silicate glass and a carbon doped silicate glass dielectric layer absent halogen doping is useful within a dual damascene method.

Abstract: A method for fabricating a dielectric layer provides for use of a carbon source material separate from a halogen source material when forming a carbon and halogen doped silicate glass dielectric layer. The use of separate carbon and halogen source materials provides enhanced process latitude when forming the carbon and halogen doped silicate glass dielectric layer. Such a carbon and halogen doped silicate glass dielectric layer having a dielectric constant greater than about 3.0 is particularly useful as an intrinsic planarizing stop layer within a damascene method. A bilayer dielectric layer construction comprising a carbon and halogen doped silicate glass and a carbon doped silicate glass dielectric layer absent halogen doping is useful within a dual damascene method.

Abstract: A method of forming an FSG film comprising the following steps. A structure is provided. An FSG film is formed over the structure by an HDP-CVD process under the following conditions: no Argon (Ar)—side sputter; SiF4 flow: from about 53 to 63 sccm; an N2 flow: from about 25 to 35 sccm; and an RF power to provide a uniform plasma density.

Abstract: A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.

Abstract: A method for reducing contaminants in a processing chamber having an inner wall by seasoning the walls. The method comprising the following steps. A first USG film is formed over the processing chamber inner wall. An FSG film is formed over the first USG film. A second USG film is formed over the FSG film. A nitrogen-containing film is formed over the second USG film wherein the first USG film, the FSG film, the second USG film and the nitrogen-containing film comprise a UFUN season film.

Abstract: A system and method for detecting chamber leakage by measuring the reflectivity of an oxidized thin film. In a preferred embodiment, a method of detecting leaks in a chamber includes providing a first monitor workpiece, placing the first monitor workpiece in the chamber, and forming at least one film on the first monitor workpiece. The reflectivity of the least one film of the first monitor workpiece is measured, wherein the reflectivity indicates whether there are leaks in the at least one seal of the chamber. In another embodiment, the method includes providing a second monitor workpiece, placing the second monitor workpiece in the chamber, and forming at least one film on the second monitor workpiece. The reflectivity of the at least one film of the second monitor workpiece is measured, and the second monitor workpiece film reflectivity is compared to the first monitor workpiece film reflectivity.

Abstract: A semiconductor processing apparatus and method are disclosed herein, including a plurality of process chambers, wherein at least one semiconductor processing operation occurs within each process chamber among the plurality of process chambers. Additionally, the apparatus and method disclosed herein include a robot mechanism for rotating each process chamber among the plurality of process chambers upon completion of an associated semiconductor processing operation. Such a robot mechanism may comprise a plurality of robots. Specifically, such a plurality of robots may include six robots configured on an associated carousel.

Abstract: A method of forming a silicon oxide, shallow trench isolation (STI) region, featuring a silicon rich, silicon oxide layer used to protect the STI region from a subsequent wet etch procedure, has been developed. The method features depositing a silicon oxide layer via PECVD procedures, without RF bias, using a high silane to oxygen ratio, resulting in a silicon rich, silicon oxide layer, located surrounding the STI region. The low etch rate of the silicon rich, silicon oxide layer, protect the silicon oxide STI region from buffered hydrofluoric wet etch procedures, used for removal of a dioxide pad layer.

Abstract: A method and reactant gas bypass system for carrying out a plasma enhanced chemical vapor deposition (PECVD) process with improved gas flow stability to avoid unionized reactant precursors and thickness non-uniformities the method including providing a semiconductor process wafer having a process surface within a plasma reactor chamber for carrying out at least one plasma process; supplying at least one reactant gas flow at a selected flow rate to bypass the plasma reactor chamber for a period of time to achieve a pre-determined flow rate stability; and, redirecting the at least one reactant gas flow into the plasma reactor chamber to carry out the at least one plasma process.

Abstract: This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically, to improve the photolithography processing window of a multi-layered dual damascene process by using a dielectric anti-reflective coating, DARC, comprised of multiple layers of silicon oxynitride, SiON, with varying k, dielectric constant values and thickness, to reduce reflectivity and improve light absorption. By varying both the thickness and the dielectric constant of the layers, the optical properties of light absorption, refractive indices, and light reflection are optimized.

Abstract: A semiconductor processing apparatus and method are disclosed herein, including a plurality of process chambers, wherein at least one semiconductor processing operation occurs within each process chamber among the plurality of process chambers. Additionally, the apparatus and method disclosed herein include a robot mechanism for rotating each process chamber among the plurality of process chambers upon completion of an associated semiconductor processing operation. Such a robot mechanism may comprise a plurality of robots. Specifically, such a plurality of robots may include six robots configured on an associated carousel.

Abstract: A method of removing residual fluorine present in a HDP-CVD chamber which includes a high pressure seasoning process, a dry-cleaning process, and a low-pressure deposition process.

Abstract: An improved composite dielectric structure and method of forming thereof which prevents delamination of FSG (F-doped SiO2) and allows FSG to be used as the interlevel dielectric between successive conducting interconnection patterns in multilevel integrated circuit structures has been developed. The composite dielectric structure comprises FSG, undoped silicon oxide (optional), silicon-rich silicon oxide and silicon nitride. The silicon-rich silicon oxide layer having a thickness between about 1000 and 2000 Angstroms prevents reaction of F atoms from the FSG layer with the silicon nitride layer during subsequent manufacturing heat treatment cycles and prevents the deleterious formation of delamination bubbles which cause peeling of the FSG layer.

Abstract: A method of removing residual contamination including metal nitride particles from semiconductor wafer surfaces including the steps of: providing at least one semiconductor wafer with metal nitride particles adhering to the at least one semiconductor wafer surface thereto; subjecting the at least one semiconductor wafer to at least one mechanical brushing process while a cleaning solution including a carboxylic acid is supplied to at least one semiconductor wafer surface; and, subjecting the at least one semiconductor wafer to an a sonic cleaning process including the carboxylic acid cleaning solution.

Abstract: A new method of preventing photoresist footing by forming a silicon oxynitride ARC layer having an oxygen-rich surface is described. An insulating layer is provided on a substrate. A metal layer is deposited overlying the insulating layer. A silicon oxynitride antireflective coating layer having an oxygen-rich surface is deposited overlying the metal layer. A photoresist mask is formed overlying the antireflective coating layer wherein the antireflective coating layer prevents photoresist footing. The antireflective coating layer and the metal layer are etched away where they are not covered by the photoresist mask to complete formation of metal lines in the fabrication of an integrated circuit.

Abstract: A method of removing residual contamination including metal nitride particles from semiconductor wafer surfaces including the steps of: providing at least one semiconductor wafer with metal nitride particles adhering to the at least one semiconductor wafer surface thereto; subjecting the at least one semiconductor wafer to at least one mechanical brushing process while a cleaning solution including a carboxylic acid is supplied to the at least one semiconductor wafer surface; and, subjecting the at least one semiconductor wafer to an a sonic cleaning process including the carboxylic acid cleaning solution.

Abstract: A method of removing residual fluorine present in a HDP-CVD chamber which may include a high pressure seasoning process, a dry cleaning process and a low pressure deposition process is disclosed.

Abstract: A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.