Abstract: A container system including cabinets, a main control unit connected to the cabinets and a heat dissipation zone is mentioned. The cabinet includes a plurality of serving zones each of which further includes a master server and at least one slave server. The heat dissipation zone is disposed at a side of the serving zone and coupled to the main control unit. Each slave server is coupled to the master server. The slave server includes at least one temperature sensor, and the temperature sensor is used for outputting temperature information to the master server when receiving the temperature demand. The master server collects the temperature information transmitted by each slave server. The master server forwards the temperature information to the main control unit. The main control unit drives the heat dissipation zone to dissipate heat of the serving zone according to the temperature information.

Abstract: A method for obtaining an external IP address and its network protocol system are provided. A rack system of the network protocol system comprises a rack management controller (RMC), a power distribution unit and at least one node server. When a Dynamic Host Configuration Protocol (DHCP) service is lost in the rack system, a jumper of the rack management controller is detected to obtain an identification code. Then, a first temporary IP address of the rack management controller is obtained based on the identification code and a first table, and a first command package is sent to the power distribution unit by the rack management controller. After the first command package is received by the power distribution unit, an IP assign service is activated to set a second temporary IP address of the node server so that the node server can still communicate with the system management terminal.

Abstract: A container system and a monitoring method for the container system are provided. The container system includes a plurality of servers and a master server node. The servers are arranged in N areas. The master server node is coupled to the servers. The master server node selects one of a plurality of servers in an ith area to be a main node of the ith area. The main node collects temperature information of the servers in the ith area to transmit highest temperature information to the master server node. When the master server node cannot connect to the main node, the master server node selects one of other servers connected to the master server node in the ith area to be a replacing node, and adjusts the replacing node to be the main node of the ith area to collect the temperature information in the ith area continuously.

Abstract: A battery assembling mechanism of electronic device includes a housing and a sliding assembly, the housing has a first sidewall, the first sidewall defines an assembling hole; The sliding assembly includes a sliding unit slidably assembled on the housing and able to block a portion of the assembling hole. The battery can be latched or taken out from the housing by sliding the sliding unit.

Abstract: A water absorbing mat includes a base having an internal space open to a top; a squeezing unit disposed in the internal space and comprising a plurality of water bladders having a plurality of legs; and a water absorbing unit disposed on the water bladders and formed of a predetermined water absorbing material such as pile threads or foam.

Abstract: An abnormal status detecting method of interrupt pins is provided. In the invention, an advanced configuration and power interface (ACPI) table is looked up for obtaining an interrupt status bit of each interrupt pin in a computer system. Afterwards, the interrupt status bit is continuously checked whether it is maintained at a specific value during a fixed time. When the interrupt status bit of one of the interrupt pins is maintained at the specific value during the fixed time, the interrupt pin is determined to be abnormal.

Abstract: A dual resolution circuit for supporting normal resolution display mode and half resolution display mode is disclosed. In the dual resolution circuit, cascaded shift registers are controlled by a group of clock signals to generate intermediate scan signals in response to a start pulse. A normal/reverse scan switch, controlling a normal scan mode and a reverse scan mode, feeds back the intermediate scan signal from one shift register to another shift register. A dual resolution switch switches signal paths of the intermediate scan signals to logic gates. The logic gates perform logic operation on an enablement signal and the intermediate scan signals to generate final scan signals used in dual resolution display modes.

Abstract: A representative AC signal generating circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between a first node and an AC signal. The second capacitor is coupled between a second node and the AC signal. The first switch is coupled between the first node and a first DC signal. The second switch is coupled between the second node and a second DC signal. The third switch is coupled between the first node and an output terminal. The fourth switch is coupled between the second node and the output terminal. The first switch and the fourth switch are synchronous, the second switch and the third switch are synchronous and the first switch and the second switch are asynchronous.

Abstract: An abnormal status detecting method of interrupt pins is provided. In the invention, an advanced configuration and power interface (ACPI) table is looked up for obtaining an interrupt status bit of each interrupt pin in a computer system. Afterwards, the interrupt status bit is continuously checked whether it is maintained at a specific value during a fixed time. When the interrupt status bit of one of the interrupt pins is maintained at the specific value during the fixed time, the interrupt pin is determined to be abnormal.

Abstract: A water absorbing mat includes a base having an internal space open to a top; a squeezing unit disposed in the internal space and comprising a plurality of water bladders having a plurality of legs; and a water absorbing unit disposed on the water bladders and formed of a predetermined water absorbing material such as pile threads or foam.

Abstract: A method of remapping memory, which is suitable for a server without a video graphics array (VGA), is provided. In the invention, a video memory buffer block is set in a system memory. First, a power on self test (POST) is executed for initializing the system memory. Next, a remap function is enabled. Then, a base address and a size of the video memory buffer block are set into a remap register of a chipset. Finally, the video memory buffer block is remapped into a memory address space originally mapped with a system management mode block according to the remap register.

Abstract: A battery assembling mechanism of electronic device includes a housing and a sliding assembly, the housing has a first sidewall, the first sidewall defines an assembling hole; The sliding assembly includes a sliding unit slidably assembled on the housing and able to block a portion of the assembling hole. The battery can be latched or taken out from the housing by sliding the sliding unit.

Abstract: Systems for displaying images and control methods are provided. In this regard, a representative control method for a display panel comprising a first source line, a second source line, a third source line, a first gate line and a second gate line, comprises: asserting the first gate line; and sequentially providing a data signal of a first polarity from a first data driver to the first source line and the third source line, and then providing a data signal of a second polarity from the data driver to the second source line.

Abstract: A surveillance system including a plurality of network video recorders (NVRs), a plurality of network video capturing devices and a plurality of streaming media presentation devices (SMPDs) is provided. The NVRs can receive and store digitized data packets, as well as transmit video/audio streams, event notifications, authorization codes and control signals. The network video capturing devices, each connected to a corresponding NVR among the plurality of NVRs via a network, can capture video/audio data and providing the digitized data packets by encoding the captured video/audio data. The SMPDs are connected to the plurality of NVRs via the network and can play captured video/audio data and alerting messages associated with the event notifications.

Abstract: The invention provides a low power multiplexer configuration in a display panel and a display panel and an electronic device using the same. The multiplexer conducts one of source output signals into to red (or green or blue) sub-pixels under control of control signals. In every time a frame is scanned or changed, the red (or green or blue) sub-pixels driven by the source output signal via the multiplexer are always in the same signal polarity, so the multiplexer consumes low power because voltage swing rates in source output signals are very low or almost zero.

Abstract: Systems for displaying images are provided, comprising a pixel array, a first gate driver and a second gate driver. The first gate driver is disposed on a first side of the pixel array and the second gate driver is disposed on a second side opposite to the first side. The first gate driver comprises a first shift register and a first AND gate. The first shift register receives a first clock signal and a start signal to generate a first control signal. The first AND gate receives a second clock signal and the first control signal to generate a first gate signal. The second gate driver comprises a second shift register and a second AND gate. The second shift register receives a second clock signal and a start signal to generate a second control signal. The second AND gate receives a first clock signal and the second control signal to generate a second gate signal.

Abstract: A representative AC signal generating circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between a first node and an AC signal. The second capacitor is coupled between a second node and the AC signal. The first switch is coupled between the first node and a first DC signal. The second switch is coupled between the second node and a second DC signal. The third switch is coupled between the first node and an output terminal. The fourth switch is coupled between the second node and the output terminal. The first switch and the fourth switch are synchronous, the second switch and the third switch are synchronous and the first switch and the second switch are asynchronous.

Abstract: Systems for displaying images are provided, comprising a pixel array, a first gate driver and a second gate driver. The first gate driver is disposed on a first side of the pixel array and the second gate driver is disposed on a second side opposite to the first side. The first gate driver comprises a first shift register and a first AND gate. The first shift register receives a first clock signal and a start signal to generate a first control signal. The first AND gate receives a second clock signal and the first control signal to generate a first gate signal. The second gate driver comprises a second shift register and a second AND gate. The second shift register receives a second clock signal and a start signal to generate a second control signal. The second AND gate receives a first clock signal and the second control signal to generate a second gate signal.

Abstract: The invention provides a low power multiplexer configuration in a display panel and a display panel and an electronic device using the same. The multiplexer conducts one of source output signals into to red (or green or blue) sub-pixels under control of control signals. In every time a frame is scanned or changed, the red (or green or blue) sub-pixels driven by the source output signal via the multiplexer are always in the same signal polarity, so the multiplexer consumes low power because voltage swing rates in source output signals are very low or almost zero.

Abstract: Systems for displaying images and control methods are provided. In this regard, a representative control method for a display panel comprising a first source line, a second source line, a third source line, a first gate line and a second gate line, comprises: asserting the first gate line; and sequentially providing a data signal of a first polarity from a first data driver to the first source line and the third source line, and then providing a data signal of a second polarity from the data driver to the second source line.