Patents by Inventor Tadahiro Imada

Tadahiro Imada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180008925
    Abstract: A fine particle detector includes: a casing part configured to accommodate an object to be heated; an electromagnetic wave generating part configured to generate electromagnetic waves of different frequencies; at least one power sensor configured to measure powers, from the casing part, of the electromagnetic waves that have entered into the casing part; and a fine particle detection controlling part configured to determine, based on the powers of the electromagnetic waves of the different frequencies measured by the at least one power sensor, whether an accumulated amount of fine particles accumulated in the object to be heated is greater than or equal to a predetermined accumulated amount.
    Type: Application
    Filed: July 6, 2017
    Publication date: January 11, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro Imada, Katsusada Motoyoshi
  • Publication number: 20170292420
    Abstract: A disclosed microwave heating apparatus includes a casing part configured to accommodate an object to be heated; a microwave generator configured to generate a microwave; an electromagnetic wave generator configured to generate an electromagnetic wave whose frequency is different from that of the microwave; an electromagnetic wave sensor configured to measure power of the electromagnetic wave, the power of the electromagnetic wave being measured after the electromagnetic wave incident on the casing part from the electromagnetic wave generator has passed through the object to be heated; and a controller configured to control, based on the power measured in the electromagnetic wave sensor, the microwave generator to generate the microwave.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 12, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro Imada, Katsusada Motoyoshi, Tatsuya Hirose, Yoichi Kawano
  • Publication number: 20170204758
    Abstract: A particulate filter includes a particulate capturing body configured to capture particulates contained in exhaust gas, and a dielectric waveguide provided around the particulate capturing body. The effective relative permittivity of the dielectric waveguide is higher than the effective relative permittivity of the particulate capturing body.
    Type: Application
    Filed: December 8, 2016
    Publication date: July 20, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro Imada, Yoichi Kawano
  • Publication number: 20170204757
    Abstract: A microwave applicator includes a housing configured to contain an object of heating, multiple microwave resonators provided on and around a periphery of the housing, a microwave conductor interconnecting the microwave resonators, and a microwave generator configured to generate microwaves of different frequencies. Each microwave resonator is configured to resonate the generated microwaves of a resonant frequency of the microwave resonator, and to emit the resonated microwaves to the object of heating contained in the housing. Among the microwave resonators, a first microwave resonator and a second microwave resonator have respective resonant frequencies that are different from each other.
    Type: Application
    Filed: November 29, 2016
    Publication date: July 20, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Patent number: 9647527
    Abstract: A power supply circuit includes a switching element and a control section. The control section converts back electromotive force generated at the time of the operation of the switching element to optical energy and converts the optical energy to an electrical signal. Furthermore, the control section drives the switching element on the basis of the electrical signal obtained by converting the optical energy. Accordingly, unlike a case where surge energy is regenerated by resonance, there is no need to use a resonant element such as an inductor. As a result, circuit scale is reduced.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: May 9, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Tadahiro Imada, Tatsuya Hirose
  • Publication number: 20170120179
    Abstract: A microwave irradiation apparatus includes: an annular microwave transmission path; a first microwave generation circuit that is coupled with the microwave transmission path and generates a first microwave; and a second microwave generation circuit that is coupled with the microwave transmission path and generates a second microwave; wherein the first microwave and the second microwave have frequencies equal to each other but have phases different from each other.
    Type: Application
    Filed: September 13, 2016
    Publication date: May 4, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Publication number: 20170104098
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.
    Type: Application
    Filed: December 21, 2016
    Publication date: April 13, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro OHKI, Masato NISHIMORI, Tadahiro IMADA
  • Patent number: 9608083
    Abstract: A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: March 28, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Masahito Kanamura, Norikazu Nakamura, Toyoo Miyajima, Masayuki Takeda, Keiji Watanabe, Toshihide Kikkawa, Kenji Imanishi, Toshihiro Ohki, Tadahiro Imada
  • Patent number: 9564527
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Ohki, Masato Nishimori, Tadahiro Imada
  • Patent number: 9547320
    Abstract: A power supply circuit includes: a depression mode transistor that includes a field plate; an enhancement mode transistor to which a source electrode and a drain electrode of the depression mode transistor are coupled; and a constant current source that is coupled to a connection node between the depression mode transistor and the enhancement mode transistor.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: January 17, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Patent number: 9515063
    Abstract: An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is provided. A lattice constant of the compound semiconductor layer (103) is smaller than both of a lattice constant of the compound semiconductor layer (102) and a lattice constant of a compound semiconductor layer (104), and a lattice constant of a compound semiconductor layer (107) is smaller than both of the lattice constants of the compound semiconductor layer (102) and the lattice constants of the compound semiconductor layer (104). A conduction band energy of the compound semiconductor layer (103) is higher than a conduction band energy of the compound semiconductor layer (104).
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: December 6, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Publication number: 20160315179
    Abstract: A compound semiconductor device includes: a substrate; a nucleation layer over the substrate; a first buffer layer over the nucleation layer; a second buffer layer between the nucleation layer and the first buffer layer, the second buffer layer containing an acceptor impurity element or a donor impurity element at a higher concentration than the first buffer layer; a carrier transit layer in contact with the first buffer layer; a carrier supply layer over the carrier transit layer; and a gate electrode, a source electrode, and a drain electrode above the carrier supply layer.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 27, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Masato Nishimori, Tadahiro Imada, LEI ZHU
  • Publication number: 20160224112
    Abstract: The present application aims at restraining an erroneous input to an input apparatus fitted to a hand for use. The input apparatus includes a touch input accepting circuit to be attached to at least any one of five fingers of a hand, and an input cancelling circuit to cancel an input to the input accepting circuit upon touching the input accepting circuit, the input cancelling circuit being attached to a finger neighboring to the finger, with the input accepting circuit attached, of the five fingers.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Publication number: 20160148924
    Abstract: An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is provided. A lattice constant of the compound semiconductor layer (103) is smaller than both of a lattice constant of the compound semiconductor layer (102) and a lattice constant of a compound semiconductor layer (104), and a lattice constant of a compound semiconductor layer (107) is smaller than both of the lattice constants of the compound semiconductor layer (102) and the lattice constants of the compound semiconductor layer (104). A conduction band energy of the compound semiconductor layer (103) is higher than a conduction band energy of the compound semiconductor layer (104).
    Type: Application
    Filed: February 1, 2016
    Publication date: May 26, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Tadahiro IMADA
  • Patent number: 9337326
    Abstract: A first GaN layer (2), a first AlGaN layer (3), a second GaN layer (4) and a third GaN layer (5) are formed in layers on a substrate (1). A second AlGaN layer (6) is formed on the sidewall of an opening (10A) formed in the multilayer structure. A gate electrode (8) is formed to fill an electrode trench (7a) in an insulating film (7). A portion (7c) of the insulating film (7) between the gate electrode (8) and the second AlGaN layer (6) functions as a gate insulating film. A source electrode (11) is formed above the gate electrode (8) and a drain electrode (12) is formed below the gate electrode (8). This configuration enables implementation of a miniatuarizable, reliable vertical HEMT that has a sufficiently high withstand voltage and high output power and is capable of a normally-off operation without problems that could otherwise result from the use of a p-type compound semiconductor.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: May 10, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Patent number: 9312373
    Abstract: An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is provided. A lattice constant of the compound semiconductor layer (103) is smaller than both of a lattice constant of the compound semiconductor layer (102) and a lattice constant of a compound semiconductor layer (104), and a lattice constant of a compound semiconductor layer (107) is smaller than both of the lattice constants of the compound semiconductor layer (102) and the lattice constants of the compound semiconductor layer (104). A conduction band energy of the compound semiconductor layer (103) is higher than a conduction band energy of the compound semiconductor layer (104).
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: April 12, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Patent number: 9240472
    Abstract: A semiconductor device, that has a transistor region and a surge-protector region, includes: a substrate; a first semiconductor layer formed on the substrate; a second semiconductor layer formed on the first semiconductor layer; a gate electrode, a source electrode, and a drain electrode formed on the second semiconductor layer in the transistor region; and a surge-protector first electrode, a surge-protector second electrode, and a surge-protector third electrode formed on the second semiconductor layer in the surge-protector region, wherein the source electrode and the surge-protector second electrode are connected to each other, wherein the drain electrode and the surge-protector third electrode are connected to each other, wherein the surge-protector first electrode is formed between the surge-protector second electrode and the surge-protector third electrode, and wherein a distance between the surge-protector first electrode and the surge-protector third electrode is smaller than a distance between the g
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 19, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Tadahiro Imada
  • Publication number: 20160005848
    Abstract: A transistor which includes an electron transit layer and an electron supply layer which are stacked in a thickness direction of a substrate; an electron transit layer formed over the substrate in parallel to the electron transit layer and the electron supply layer; an anode electrode which forms a Schottky junction with the electron transit layer; and a cathode electrode which forms an ohmic junction with the electron transit layer are provided. The anode electrode is connected to a source of the transistor, and the cathode electrode is connected to a drain of the transistor.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 7, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Tadahiro IMADA
  • Publication number: 20150372587
    Abstract: A power supply circuit includes a switching element and a control section. The control section converts back electromotive force generated at the time of the operation of the switching element to optical energy and converts the optical energy to an electrical signal. Furthermore, the control section drives the switching element on the basis of the electrical signal obtained by converting the optical energy. Accordingly, unlike a case where surge energy is regenerated by resonance, there is no need to use a resonant element such as an inductor. As a result, circuit scale is reduced.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 24, 2015
    Inventors: Tadahiro Imada, Tatsuya Hirose
  • Publication number: 20150333164
    Abstract: A first GaN layer (2), a first AlGaN layer (3), a second GaN layer (4) and a third GaN layer (5) are formed in layers on a substrate (1). A second AlGaN layer (6) is formed on the sidewall of an opening (10A) formed in the multilayer structure. A gate electrode (8) is formed to fill an electrode trench (7a) in an insulating film (7). A portion (7c) of the insulating film (7) between the gate electrode (8) and the second AlGaN layer (6) functions as a gate insulating film. A source electrode (11) is formed above the gate electrode (8) and a drain electrode (12) is formed below the gate electrode (8). This configuration enables implementation of a miniatuarizable, reliable vertical HEMT that has a sufficiently high withstand voltage and high output power and is capable of a normally-off operation without problems that could otherwise result from the use of a p-type compound semiconductor.
    Type: Application
    Filed: July 29, 2015
    Publication date: November 19, 2015
    Applicant: Fujitsu Limited
    Inventor: Tadahiro IMADA