Patents by Inventor Tadahiro Kuroda

Tadahiro Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090196312
    Abstract: An integrated circuit multiplexes transmission data faster than by a system clock, and transfers a timing pulse Txclk for that multiplexing and a multiplexed signal Txdata from a transmitter chip 100 to a receiver chip 150 through communications by inductive coupling, respectively. Because of a transfer by inductive coupling being broadband, close-proximity wireless communications, the receiver chip 150 can faithfully obtain timing information on the timing pulse Txclk including jitter generated by a simple oscillator, and can thus accurately restore original data even by a high-speed transmission. This allows, in an integrated circuit that carries out communications by inductive coupling between chips to be stacked and mounted, carrying out communications between semiconductor chips with a small required area and faster than by a system clock.
    Type: Application
    Filed: January 27, 2009
    Publication date: August 6, 2009
    Applicant: Keio University
    Inventor: Tadahiro Kuroda
  • Publication number: 20090196388
    Abstract: Disclosed is a semiconductor integrated circuit device including a transmitting circuit and a receiving coil inductively coupled to a transmitting coil. The transmitting circuit transmits data by supplying a current through the transmitting coil not at the time of transition of data but at every rising edge or falling edge of a clock used in transmission of data. At every rising edge or falling edge of the clock, a receiving circuit captures a voltage induced in the receiving coil due to the current flowing through the transmitting coil, reproduces the transmitted data and outputs the reproduced data.
    Type: Application
    Filed: January 17, 2007
    Publication date: August 6, 2009
    Applicants: NEC CORPORATION, KEIO UNIVERSITY
    Inventors: Muneo Fukaishi, Yoshihiro Nakagawa, Tadahiro Kuroda
  • Patent number: 7546106
    Abstract: An electronic circuit capable of carrying out communications by inductive coupling with minimum power consumption between substrates. Although the amplification factor of the amplifier 10a is 1, the amplification factors of the amplifiers 10b through 10d are, respectively, 2, 4 and 8. Amplification is carried out at the amplification factors 1 through 15 (=1+2+4+8) as a whole by a combination thereof. The transmit power control register 21 outputs ON and OFF signals to the respective amplifiers 10a through 10d so as to bring about transmit power responsive to the distance to a substrate having a receiver coil which is a destination of transmission (that is, the distance between a transmitter coil and a receiver coil), in further detail, so as to have an amplification factor by which transmit power proportionate to the distance can be obtained, and selects a combination of the amplifiers 10b through 10d.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: June 9, 2009
    Assignee: Keio University
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Miura
  • Publication number: 20090057039
    Abstract: The invention provides an electronic circuit capable of simplifying a transmitter circuit and yet realizing low-voltage drive and low power consumption where communications between substrates are realized by inductive coupling. As the transmission data Txdata are turned from LOW to HIGH, the transistor T1 is turned from OFF to ON, and at the same time, the transistor T2 is turned from ON to OFF, wherein the current IT is caused to flow to the transmitter coil 14, and the capacitor 15 is charged. As the capacitor 15 is sufficiently charged, the current IT stops flowing. As a result, a pulse current of a triangular waveform is flown to the transmitter coil 14. Next, as the transmission data Txdata are turned from HIGH to LOW, the current IT is inversely flown to the transmitter coil 14, and the capacitor 15 is discharged, wherein a pulse current having a triangular waveform of reversed polarity is flown to the transmitter coil 14.
    Type: Application
    Filed: August 1, 2005
    Publication date: March 5, 2009
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Miura
  • Publication number: 20080258744
    Abstract: The present invention has an object to provide an electronic circuit testing apparatus that is preferable for testing an electronic circuit which carries out communications between substrates based on inductive coupling and is capable of testing the electronic circuit without using test pads, wherein a probe 15 is caused to intervene in a communications channel composed by inductive coupling based on the first and second transmitter coils 21a, 21b; and the first and second receiver coils 23a, 23b, and an LSI is tested by a tester 11, buffers 12 and 13, and a Tx/Rx switch 14. Accordingly, it is not be necessary for that the electronic circuit testing apparatus is provided with a needle that touches pads and leads of the electronic circuit, and the service life there can be lengthened.
    Type: Application
    Filed: September 21, 2005
    Publication date: October 23, 2008
    Applicant: KEIO UNIVERSITY
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Mirua
  • Publication number: 20070289772
    Abstract: The present invention has an object to provide an electronic circuit capable of efficiently transmitting signals in a case where signals are transmitted over substrates with three or more substrates three-dimensionally mounted. In the present invention, LSI chips are stacked in three layers, and a bus is formed over three chips. The first through the third transmitter coils 13a, 13b, 13c and the first through the third receiver coils 15a, 15b, 15c are formed by wiring on the first through the third LSI chips 11a, 11b, 11c. These three pairs of transmitter and receiver coils are disposed so that the centers of the openings thereof are coincident with each other, whereby three pairs of transmitter and receiver coils 13 and 15 form inductive coupling to enable communications.
    Type: Application
    Filed: February 14, 2005
    Publication date: December 20, 2007
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Yusmeeraz Yusof, Noriyuki Miura, Takayasu Sakurai
  • Publication number: 20070274198
    Abstract: The invention provides an electronic circuit capable of reducing crosstalk to such a degree that the crosstalk can be substantially disregarded even where a plurality of communications channels are juxtaposed in close proximity to each other when achieving communications between substrates by inductive coupling. The transmitter coils 11 are placed on a lower chip and the receiver coils 12 are placed on an upper chip, and where it is assumed that the distance between the chips is X, and the distance between the communications channels is Y(that is, the horizontal distance between the coil centers), there exists a position, where the magnetic flux density in the receiver coils 12 resulting from the transmitter coils 11 becomes zero (0), at a predetermined Yo.
    Type: Application
    Filed: August 17, 2005
    Publication date: November 29, 2007
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Miura
  • Publication number: 20060176676
    Abstract: The invention provides an electronic circuit capable of carrying out communications by inductive coupling with minimum power consumption between substrates. In the electronic circuit according to the invention, although the amplification factor of the amplifier 10a is 1, the amplification factors of the amplifiers 10b through 10d are, respectively, 2, 4 and 8. Amplification is carried out at the amplification factors 1 through 15 (=1+2+4+8) as a whole by a combination thereof. The transmit power control register 21 outputs ON and OFF signals to the respective amplifiers 10a through 10d so as to bring about transmit power responsive to the distance to a substrate having a receiver coil which is a destination of transmission (that is, the distance between a transmitter coil and a receiver coil), in further detail, so as to have an amplification factor by which transmit power proportionate to the distance can be obtained, and selects a combination of the amplifiers 10a through 10d.
    Type: Application
    Filed: December 14, 2005
    Publication date: August 10, 2006
    Applicant: KEIO UNIVERSITY
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Miura
  • Publication number: 20060176624
    Abstract: Where communications between substrates are formed by inductive coupling, the invention provides an electronic circuit that is less influenced by magnetic fluxes from a noise source. In the electronic circuit according to the invention, in regard to the transmitter coils and the receiver coils, one coil thereof is composed of the first coil 11a and the second coil 11b. The first coil 11a and the second coil 11b are wound by the same number of times and are connected to each other in series. When a current flows in the arrow direction, if observed so as to face the paper surface of the drawing, the second coil 11b is wound in the left direction while the first coil 11a is wound in the right direction.
    Type: Application
    Filed: December 14, 2005
    Publication date: August 10, 2006
    Applicant: KEIO UNIVERSITY
    Inventors: Tadahiro Kuroda, Daisuke Mizoguchi, Noriyuki Miura
  • Publication number: 20050213635
    Abstract: In an ultra-wideband receiver for receiving discontinuous pulse signals and for demodulating the receive signals, an amplifier amplifies signals received, and a demodulator demodulates the amplified signals. A controller controls the demodulator and the amplifier based on the signals demodulated by the demodulator. The controller sends a signal to the amplifier to activate the amplifier only when the signals are received in order to decrease the power consumption in the amplifier. Further, the demodulator demodulates the amplified signals by generating a plurality of single pulses as template pulses, multiplies the amplified signals with the plurality of signal pulses, and integrates the multiplied signals to obtain demodulated data.
    Type: Application
    Filed: January 27, 2005
    Publication date: September 29, 2005
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Takahide Terada, Shingo Yoshizumi, Tadahiro Kuroda
  • Publication number: 20050152604
    Abstract: According to a template matching method, a matching value representing matching between a process area image and a target image is calculated by using the process area image in an arbitrary process area acquired from the edge image of an input image and template data representing the shape feature of the target image. The area of the target image in the input image is specified on the basis of the matching value. The template data is formed from positive points representing positions at which the edge of the target image exists in the process area and negative points representing positions at which no edge exists in the process area. The matching value is calculated in accordance with the positional relationship between the positive points, the negative points, and each edge present within the process area image. A target image area extraction apparatus is also disclosed.
    Type: Application
    Filed: October 21, 2004
    Publication date: July 14, 2005
    Inventors: Shuji Kitagawa, Seiichiro Watanabe, Tadahiro Kuroda, Kazuhiro Sato
  • Patent number: 6593800
    Abstract: The disclosed semiconductor integrated circuit device can control the threshold thereof without adding any other supply voltages except a drive supply voltage and a ground supply voltage. The semiconductor integrated circuit device comprises: a substrate potential generating circuit operative on the basis of a control signal, for deepening a substrate bias by pumping out charges from a semiconductor substrate when activated, but for setting an output thereof to a high impedance when deactivated; and a switch circuit operative on the basis of the control signal and turned on when the substrate potential generating circuit is deactivated, to set potential of the semiconductor substrate to a supply potential, but turned off when the substrate potential generating circuit is activated.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: July 15, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tadahiro Kuroda
  • Patent number: 6476639
    Abstract: A semiconductor integrated circuit device is capable of producing an output without being influenced by the other input. The semiconductor integrated circuit device includes a logic circuit designed to process a predetermined logical operation on the basis of an input signal, and an input capacitance equalizing circuit designed to equalize the input capacitance of the logical circuit.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: November 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shouhei Kousai, Mototsugu Hamada, Tadahiro Kuroda
  • Publication number: 20020075066
    Abstract: The disclosed semiconductor integrated circuit device can control the threshold thereof without adding any other supply voltages except a drive supply voltage and a ground supply voltage. The semiconductor integrated circuit device comprises: a substrate potential generating circuit operative on the basis of a control signal, for deepening a substrate bias by pumping out charges from a semiconductor substrate when activated, but for setting an output thereof to a high impedance when deactivated; and a switch circuit operative on the basis of the control signal and turned on when the substrate potential generating circuit is deactivated, to set potential of the semiconductor substrate to a supply potential, but turned off when the substrate potential generating circuit is activated.
    Type: Application
    Filed: November 6, 2001
    Publication date: June 20, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tadahiro Kuroda
  • Patent number: 6377063
    Abstract: The semiconductor device includes a circuit, such as, an ECL circuit for comparing input signals with a reference potential determined as a circuit threshold value and outputting an output signal according to the comparison result. The semiconductor device further includes a switching circuit for switching the reference potential level between ordinary operation and burn-in operation of the ECL circuit. The time required for the burn-in operation can be reduced markedly.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: April 23, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahiro Kuroda, Makoto Noda
  • Patent number: 6373291
    Abstract: A semiconductor integrated circuit comprises a first MOS transistor of a first conductivity type having one of its source and drain connected to a first signal input node, having the other thereof connected to a signal output node, and receiving a select signal at its gate; a second MOS transistor of a second conductivity type in parallel connection with the first MOS transistor, and receiving an inverted signal of the select signal; and a third MOS transistor of the second conductivity type having one of its source and drain connected to a second signal input node, having the other thereof connected to the signal output node, and receiving the select signal at its gate, the semiconductor integrated circuit being configured to satisfy the relation as expressed by an inequality W1>W2 where W1 and W2 are gate widths of the first and second MOS transistors.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mototsugu Hamada, Tadahiro Kuroda
  • Patent number: 6373323
    Abstract: The disclosed semiconductor integrated circuit device can control the threshold thereof without adding any other supply voltages except a drive supply voltage and a ground supply voltage. The semiconductor integrated circuit device comprises: a substrate potential generating circuit operative on the basis of a control signal, for deepening a substrate bias by pumping out charges from a semiconductor substrate when activated, but for setting an output thereof to a high impedance when deactivated; and a switch circuit operative on the basis of the control signal and turned on when the substrate potential generating circuit is deactivated, to set potential of the semiconductor substrate to a supply potential, but turned off when the substrate potential generating circuit is activated.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tadahiro Kuroda
  • Publication number: 20020000864
    Abstract: A back gate of a P-channel MOS transistor constituting a CMOS input protection circuit or a CMOS output protection circuit, is biased by a voltage higher than a peak voltage of overshoot of an input signal or an output signal, or a back gate of an N-channel MOS transistor constituting an input protection circuit or an output protection circuit, is biased by a voltage lower than a negative peak voltage of undershoot, thereby restricting a current inflow to a substrate from an I/O terminal that might cause a latch-up in the CMOS semiconductor integrated circuit.
    Type: Application
    Filed: August 18, 1998
    Publication date: January 3, 2002
    Inventors: TETSUYA FUJITA, TADAHIRO KURODA
  • Patent number: 6331796
    Abstract: A p-type MOS transistor 40 in a CMOS inverter 50 of a load circuit 20 has a threshold voltage whose absolute value |Vtp| is higher than the threshold voltage Vtn of an n-type MOS transistor 30 forming a pass-transistor logic circuit 10. Therefore, even when the output signal V1out from the pass-transistor logic circuit 10 is HIGH, a leak current can be prevented from flowing into the CMOS inverter.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: December 18, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mototsugu Hamada, Tadahiro Kuroda
  • Publication number: 20010015658
    Abstract: A semiconductor integrated circuit device is capable of producing an output without being influenced by the other input. The semiconductor integrated circuit device includes a logic circuit designed to process a predetermined logical operation on the basis of an input signal, and an input capacitance equalizing circuit designed to equalize the input capacitance of the logical circuit.
    Type: Application
    Filed: February 21, 2001
    Publication date: August 23, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shouhei Kousai, Mototsugu Hamada, Tadahiro Kuroda