Patents by Inventor Tadashi Kurozo

Tadashi Kurozo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481625
    Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. The voltage regulator includes: a first amplifier for detecting that undershoot occurs in an output voltage; a second amplifier for detecting that overshoot occurs in the output voltage; a first constant current circuit for increasing a bias current of an error amplifier circuit by a first amount for a first time period in response to a signal determined based on one of an output signal of the first amplifier and an output signal of the second amplifier; a second constant current circuit for increasing the bias current of the error amplifier circuit by a second amount larger than the first amount for a second time period shorter than the first time period in response to a signal determined based on the output signal of the first amplifier; and a first switch circuit for pulling up a gate of an output transistor in response to a signal determined based on the output signal of the second amplifier.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: November 19, 2019
    Assignee: ABLIC INC.
    Inventors: Tadashi Kurozo, Tomoyuki Yokoyama
  • Patent number: 10177655
    Abstract: Provided is a voltage regulator capable of stably suppressing overshoot. The voltage regulator includes a non-regulated state detection circuit for detecting a non-regulated state, and an overshoot suppression circuit. The overshoot suppression circuit is configured to operate when the non-regulated state detection circuit detects the non-regulated state.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 8, 2019
    Assignee: ABLIC INC.
    Inventors: Toshiyuki Tsuzaki, Tadashi Kurozo, Manabu Fujimura
  • Publication number: 20180292854
    Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. The voltage regulator includes: a first amplifier for detecting that undershoot occurs in an output voltage; a second amplifier for detecting that overshoot occurs in the output voltage; a first constant current circuit for increasing a bias current of an error amplifier circuit by a first amount for a first time period in response to a signal determined based on one of an output signal of the first amplifier and an output signal of the second amplifier; a second constant current circuit for increasing the bias current of the error amplifier circuit by a second amount larger than the first amount for a second time period shorter than the first time period in response to a signal determined based on the output signal of the first amplifier; and a first switch circuit for pulling up a gate of an output transistor in response to a signal determined based on the output signal of the second amplifier.
    Type: Application
    Filed: June 8, 2018
    Publication date: October 11, 2018
    Inventors: Tadashi KUROZO, Tomoyuki YOKOYAMA
  • Patent number: 10061335
    Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. The voltage regulator includes: a first amplifier for detecting that undershoot occurs in an output voltage; a second amplifier for detecting that overshoot occurs in the output voltage; a first constant current circuit for increasing a bias current of an error amplifier circuit by a first amount for a first time period in response to a signal determined based on one of an output signal of the first amplifier and an output signal of the second amplifier; a second constant current circuit for increasing the bias current of the error amplifier circuit by a second amount larger than the first amount for a second time period shorter than the first time period in response to a signal determined based on the output signal of the first amplifier; and a first switch circuit for pulling up a gate of an output transistor in response to a signal determined based on the output signal of the second amplifier.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: August 28, 2018
    Assignee: ABLIC INC.
    Inventors: Tadashi Kurozo, Tomoyuki Yokoyama
  • Patent number: 9600006
    Abstract: Provided is a voltage regulator having a simple circuit configuration in which a protection circuit is not erroneously operated, and delay time of activation of the protection circuit is short. The voltage regulator includes: a protection circuit configured to control an output transistor when an abnormality of the voltage regulator is detected; a first constant current circuit configured to supply operating current to the protection circuit; and a detection circuit configured to detect output current flowing through the output transistor, to thereby control the first constant current circuit. The detection circuit is further configured to detect the output current with a predetermined reference current value. The protection circuit is further configured to control the output transistor so that the output current does not fall below the reference current value.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: March 21, 2017
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Tadashi Kurozo, Takao Nakashimo, Michiyasu Deguchi
  • Publication number: 20160211751
    Abstract: Provided is a voltage regulator having a simple circuit configuration in which a protection circuit is not erroneously operated, and delay time of activation of the protection circuit is short. The voltage regulator includes: a protection circuit configured to control an output transistor when an abnormality of the voltage regulator is detected; a first constant current circuit configured to supply operating current to the protection circuit; and a detection circuit configured to detect output current flowing through the output transistor, to thereby control the first constant current circuit. The detection circuit is further configured to detect the output current with a predetermined reference current value. The protection circuit is further configured to control the output transistor so that the output current does not fall below the reference current value.
    Type: Application
    Filed: January 19, 2016
    Publication date: July 21, 2016
    Inventors: Tadashi KUROZO, Takao NAKASHIMO, Michiyasu DEGUCHI
  • Patent number: 9323258
    Abstract: Provided is a voltage regulator that is low in current consumption and is capable of suppressing the occurrence of an excessive overshoot at an output terminal when a power supply voltage becomes high in a non-regulated state. The voltage regulator includes: an overshoot limiting circuit for detecting an occurrence of an overshoot in an output voltage and limiting a current of the output transistor; and a non-regulated state detection circuit for detecting a non-regulated state of the voltage regulator based on a voltage of an output terminal and a current flowing through the output transistor. The overshoot limiting circuit has an operating current controlled by a detection signal of the non-regulated state detection circuit.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: April 26, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Takao Nakashimo, Tadashi Kurozo
  • Publication number: 20160105113
    Abstract: Provided is a voltage regulator capable of stably suppressing overshoot. The voltage regulator includes a non-regulated state detection circuit for detecting a non-regulated state, and an overshoot suppression circuit. The overshoot suppression circuit is configured to operate when the non-regulated state detection circuit detects the non-regulated state.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 14, 2016
    Inventors: Toshiyuki TSUZAKI, Tadashi KUROZO, Manabu FUJIMURA
  • Publication number: 20150177752
    Abstract: Provided is a voltage regulator that is low in current consumption and is capable of suppressing the occurrence of an excessive overshoot at an output terminal when a power supply voltage becomes high in a non-regulated state. The voltage regulator includes: an overshoot limiting circuit for detecting an occurrence of an overshoot in an output voltage and limiting a current of the output transistor; and a non-regulated state detection circuit for detecting a non-regulated state of the voltage regulator based on a voltage of an output terminal and a current flowing through the output transistor. The overshoot limiting circuit has an operating current controlled by a detection signal of the non-regulated state detection circuit.
    Type: Application
    Filed: March 5, 2015
    Publication date: June 25, 2015
    Inventors: Takao NAKASHIMO, Tadashi KUROZO
  • Publication number: 20140354249
    Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. The voltage regulator includes: a first amplifier for detecting that undershoot occurs in an output voltage; a second amplifier for detecting that overshoot occurs in the output voltage; a first constant current circuit for increasing a bias current of an error amplifier circuit by a first amount for a first time period in response to a signal determined based on one of an output signal of the first amplifier and an output signal of the second amplifier; a second constant current circuit for increasing the bias current of the error amplifier circuit by a second amount larger than the first amount for a second time period shorter than the first time period in response to a signal determined based on the output signal of the first amplifier; and a first switch circuit for pulling up a gate of an output transistor in response to a signal determined based on the output signal of the second amplifier.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 4, 2014
    Applicant: Seiko Instruments Inc.
    Inventors: Tadashi KUROZO, Tomoyuki YOKOYAMA
  • Patent number: 8085018
    Abstract: Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: December 27, 2011
    Assignee: Seiko Instruments Inc.
    Inventors: Yotaro Nihei, Takashi Imura, Tadashi Kurozo
  • Publication number: 20090302811
    Abstract: Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 10, 2009
    Inventors: Yotaro Nihei, Takashi Imura, Tadashi Kurozo
  • Publication number: 20080180079
    Abstract: A voltage regulator according to the present invention is operated stably. Regardless of a condition of a load (25), a variation in drain voltage of a PMOS transistor (34) is made equal to a variation in output voltage (Vout) at an output terminal of the voltage regulator. Then, a variation in voltage which is equal to the variation in output voltage (Vout) at the output terminal which is caused by a change of the condition of the load (25) is fed back to an error amplifier (70), so a gain of a signal for phase compensation which is fed back to the error amplifier (70) is determined based on the output voltage (Vout). Therefore, even when the condition of the load (25) changes, the behavior of phase compensation is correct.
    Type: Application
    Filed: November 29, 2007
    Publication date: July 31, 2008
    Inventors: Tadashi Kurozo, Kiyoshi Yoshikawa, Fumiyasu Utsunomiya