Patents by Inventor Tadashi Kuwabara

Tadashi Kuwabara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020093852
    Abstract: A memory device which includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data, and a controller having a first data input connected to receive first data, a second data input connected to receive second data, a third data input connected to receive a function mode signal, and operation unit for executing operations between the first data and the second data. The operation unit includes a function setting unit for setting a function indicated by a function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the set function is executed for the first and second data. The operation result is written into the selected part of the storage locations during one memory cycle.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 18, 2002
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 6359812
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: March 19, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Publication number: 20020016854
    Abstract: In an information sending and receiving system in which an information sending equipment and at least one information receiving equipment send and receive information through a transmission medium, a management message is sent from the information sending equipment to the information receiving equipment thereby to create a list of a content code expressing a data message registered on the information receiving equipment side within the information receiving equipment. Then, a data message containing a content code and data is transmitted from the information sending equipment to the information receiving equipment. The information receiving equipment selects a data message by comparing a content code of a data message and a list of its own content code. The content code list may be created within the information sending equipment based on a property value in an answer message from the information receiving equipment.
    Type: Application
    Filed: September 18, 2001
    Publication date: February 7, 2002
    Inventors: Shigeki Hirasawa, Michio Morioka, Tadashi Kuwabara, Tomochika Ozaki, Yuichi Yagawa, Akio Yajima
  • Publication number: 20010046160
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Application
    Filed: December 29, 2000
    Publication date: November 29, 2001
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 6314467
    Abstract: In an information sending and receiving system in which an information sending equipment and at least one information receiving equipment send and receive information through a transmission medium, a management message is sent from the information sending equipment to the information receiving equipment thereby to create a list of a content code expressing a data message registered on the information receiving equipment side within the information receiving equipment. Then, a data message containing a content code and data is transmitted from the information sending equipment to the information receiving equipment. The information receiving equipment selects a data message by comparing a content code of a data message and a list of its own content code. The content code list may be created within the information sending equipment based on a property value in an answer message from the information receiving equipment.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: November 6, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Shigeki Hirasawa, Michio Morioka, Tadashi Kuwabara, Tomochika Ozaki, Yuichi Yagawa, Akio Yajima
  • Patent number: 6198665
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: March 6, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 6028795
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: February 22, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5991798
    Abstract: Information obtained through a network and information distributed from a package medium are mixedly displayed. A package medium 3 has a URL (Universal Resource Locator) and information for converting a directory structure in the package medium. A terminal has information for managing correspondence between data of a received electronic mail 6 and a URL of the data. The URL is used for designating data. When the designated URL exists in the terminal, data is read from the terminal. When the designated URL exists in the package medium, data is read from the package medium. The read data is mixedly displayed on one screen.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: November 23, 1999
    Assignees: Hitachi, Ltd., Hitachi Information Network, Ltd.
    Inventors: Tomochika Ozaki, Tadashi Kuwabara, Toshiyuki Oda, Mika Nishiyama, Takashi Takeuchi, Jun Miyauchi
  • Patent number: 5933478
    Abstract: In the handheld terminal device, when a message reception unit receives from a host computer a new arrival message indicating a new arrival of a file (or electronic mail), a control unit analyzes the new arrival message to obtain identifier information for identifying the file (or electronic mail) and a telephone number of the host computer. After a line connection to the host computer is established by a handheld phone transceiver unit, a fetch request command for fetching the file (or electronic mail) is transmitted to automatically fetch the file (or electronic mail) from the host computer and make the user know the contents of the file (or electronic mail) by using a display unit. A FAX transmitting user designates a destination handheld terminal device and transmits FAX image data to a communication server (CS). CS stores the received FAX image data and transmits a FAX arrival message to a pager connected to the destination handheld terminal device.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Tomochika Ozaki, Yoshihiko Kunimori, Kouichi Hibi, Michihiro Mese, Hiroshi Shimizu, Tooru Yokozawa, Tadashi Kuwabara, Muneaki Yamaguchi
  • Patent number: 5923591
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: April 5, 1998
    Date of Patent: July 13, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5867281
    Abstract: An electronic mail system and method enabling a recipient of electronic mail to intuitively and easily perform the processing requested by the sender in the electronic mail. The sender of the electronic mail with the system of the present invention generates information including icons information representing processing functions and operations to be performed by the recipient of the electronic mail and attaches the generated information as added information to the message of the electronic mail to be sent so that appropriate processing is effected by the recipient.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: February 2, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Nozoe, Hideki Kuwamoto, Chiyo Akamatsu, Tadashi Kuwabara
  • Patent number: 5838337
    Abstract: A graphic system which includes a display device having a graphic display area which includes a plurality of display portions and a plurality of one-chip semiconductor integrated circuit devices. Each one-chip semiconductor integrated circuit includes memory for storing a plurality of pixel data, each pixel data includes a plurality of bits and color data, and a logic circuit for carrying out logic operation on a unit of one pixel data read out from the memory based on a function signal supplied to the one-chip semiconductor integrated circuit device. The function signal indicates a relation between the unit of one pixel data read out from the memory and pixel data output by the logic circuit. The invention further includes an external device for supplying the function signal to the one-chip semiconductor integrated circuit device. The logic circuits, of the plurality of one-chip semiconductor integrated circuit devices, each carry out the same logic operation in accordance with the function signal.
    Type: Grant
    Filed: August 23, 1994
    Date of Patent: November 17, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5781479
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: July 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5767864
    Abstract: A device for displaying pixel data on a graphic display area of a display device. The graphic display area includes a plurality of display portions. The invention includes a memory for storing a plurality of pixel data, each pixel data includes a plurality of bits and color data, and a logic circuit for carrying out a logic operation on a combination of a unit of one pixel data read out from the memory and external data supplied to the device. The logic circuit outputs pixel data based on the logic operation so as to display the pixel data on one of the display portions of the graphic display area of the display device.
    Type: Grant
    Filed: August 23, 1994
    Date of Patent: June 16, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5754629
    Abstract: A schedule management system which can display a schedule on a screen and enables the user to enter schedule topics promptly and accurately without performing complicated operation is provided. An external voice is input through a microphone or a network control unit and is converted into a digital signal by an A/D converter and a coder. An identifier related to the digital signal is generated. The identifier is displayed on a schedule on a display unit. The digital signal is stored in a memory in relation to the identifier. A user specifies the displayed identifier through an operation section, whereby the digital signal related to the identifier is extracted from the memory by a CPU, the extracted digital signal is converted into an analog signal by a D/A converter, and the analog signal is output as a voice through a loudspeaker or the network control unit to the outside. Like a voice, an image can also be handled.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: May 19, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiko Kunimori, Toshio Kamimura, Tomochika Ozaki, Takao Iwatani, Tadashi Kuwabara, Michihiro Mese, Tomohiro Esaki
  • Patent number: 5740369
    Abstract: A transmitting management apparatus transmits information having an identification number corresponding to a portable information terminal to which information is to be delivered and/or having a sorting code identifying the information. The portable information terminal receiving the transmitted information selectively acquires and stores proper information by referring to the identification number and/or the sorting code of the received information, and displays the proper information on a display means.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: April 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Tooru Yokozawa, Hiroshi Shimizu, Wataru Kitayama, Hidefumi Goto, Tadashi Kuwabara, Tomohiro Esaki, Yoshihiro Yamada
  • Patent number: 5719809
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: February 17, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5637932
    Abstract: A power consumption control apparatus for an information processing apparatus having multi-tasking control which executes a plurality of information processing operations in parallel by time-divisionally switching a plurality of tasks in an arithmetic processing unit. The power consumption controlled apparatus detects an event where there are no information processing operations to be executed, sets the arithmetic processing unit to a power-saving mode in response to the event and immediately clears the power-saving mode set in the arithmetic processing unit in response to an interrupt signal from an input/output device. Alternatively, the power consumption control apparatus after detecting the event stops supply of a clock to the arithmetic processing unit or lowers a frequency of the clock in response to the event.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: June 10, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Koreeda, Tadashi Kuwabara, Naomichi Nonaka, Keiichi Nakane, Shigeki Taniguchi
  • Patent number: 5617360
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: April 1, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda
  • Patent number: 5615155
    Abstract: A memory device formed on an IC chip includes dynamic random access memories for effecting data read and write operations, first and second data terminals for receiving data from an external side of the IC chip, and a controller having a first data input connected to the first data terminal to receive first data, a second input connected to receive second data read, a third data input connected to the second data terminal to receive a function mode signal, and operation unit for executing operations between the first data provided from the first data input and the second data provided from the second input. The operation unit includes a function setting unit responsive to the function mode signal for setting a function indicated by the function mode signal prior to receipt of the first data. The second data is read out of a selected part of the storage locations. The operation corresponding to the function set by the function setting unit is executed for the first and second data.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: March 25, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Kimura, Toshihiko Ogura, Hiroaki Aotsu, Mitsuru Ikegami, Tadashi Kuwabara, Hiromichi Enomoto, Tadashi Kyoda