Patents by Inventor Tadashi Narita

Tadashi Narita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100207215
    Abstract: A semiconductor device includes a semiconductor substrate; an N-channel type transistor forming region formed on the semiconductor substrate; a P-channel type transistor forming region formed on the semiconductor substrate and arranged adjacent to the N-channel type transistor forming region; and a gate electrode formed on the semiconductor substrate over the N-channel type transistor forming region and the P-channel type transistor forming region. The gate electrode has a boundary inclusion portion formed in a first region including a boundary line between the N-channel type transistor forming region and the P-channel type transistor forming region and a boundary exclusion portion formed in a second region not including the boundary line. The gate electrode includes a conductive silicon layer and a metal silicide layer formed on the conductive silicon layer.
    Type: Application
    Filed: January 27, 2010
    Publication date: August 19, 2010
    Inventor: Tadashi NARITA
  • Patent number: 7667244
    Abstract: On a semiconductor substrate, a gate electrode is disposed obliquely across the boundary between an N-type region and a P-type region, and thereby an effective gate width of a region, in which the boundary between the N-type region and the P-type region intersects with the gate electrode, is wider than that of the gate electrode. Accordingly, the occurrence of abnormal resistance, which makes it difficult for an electric current to flow in the gate electrode on the boundary between the N-type region and the P-type region, may be effectively suppressed without physically widening the gate width. Moreover, widening of the gate width of the gate electrode may be eliminated in suppressing the occurrence of abnormal resistance and it is not necessary to enlarge the areas of the N-type region and the P-type region, thereby inevitable enlargement of the overall size of the semiconductor device being avoided.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: February 23, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Tadashi Narita
  • Patent number: 7629223
    Abstract: A method for manufacturing a semiconductor device includes forming a plurality of trenches for element isolation and a plurality of trenches for alignment mark on a substrate. The substrate has an active region. The method also includes laminating an oxide film on the substrate and over both of the trenches. The method also includes etching the oxide film using a resist mask that masks the element isolation trenches, so that the oxide film laminated in the active region and the oxide film laminated in the alignment mark trenches are removed. The method also includes polishing a surface of the substrate to planarize or smooth the surface of the substrate. Accordingly, those portions of the oxide film which project from the substrate surface are eliminated and the oxide film remains only inside the element isolation trenches. This divides the active region into a plurality of individual active regions for the respective semiconductor elements.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: December 8, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Tadashi Narita, Katsuo Oshima
  • Publication number: 20090137092
    Abstract: A method for manufacturing a semiconductor device includes forming a plurality of trenches for element isolation and a plurality of trenches for alignment mark on a substrate. The substrate has an active region. The method also includes laminating an oxide film on the substrate and over both of the trenches. The method also includes etching the oxide film using a resist mask that masks the element isolation trenches, so that the oxide film laminated in the active region and the oxide film laminated in the alignment mark trenches are removed. The method also includes polishing a surface of the substrate to planarize or smooth the surface of the substrate. Accordingly, those portions of the oxide film which project from the substrate surface are eliminated and the oxide film remains only inside the element isolation trenches. This divides the active region into a plurality of individual active regions for the respective semiconductor elements.
    Type: Application
    Filed: November 20, 2008
    Publication date: May 28, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Tadashi Narita, Katsuo Oshima
  • Publication number: 20080303100
    Abstract: On a semiconductor substrate, a gate electrode is disposed obliquely across the boundary between an N-type region and a P-type region, and thereby an effective gate width of a region, in which the boundary between the N-type region and the P-type region intersects with the gate electrode, is wider than that of the gate electrode. Accordingly, the occurrence of abnormal resistance, which makes it difficult for an electric current to flow in the gate electrode on the boundary between the N-type region and the P-type region, may be effectively suppressed without physically widening the gate width. Moreover, widening of the gate width of the gate electrode may be eliminated in suppressing the occurrence of abnormal resistance and it is not necessary to enlarge the areas of the N-type region and the P-type region, thereby inevitable enlargement of the overall size of the semiconductor device being avoided.
    Type: Application
    Filed: May 5, 2008
    Publication date: December 11, 2008
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Tadashi Narita
  • Patent number: 7282549
    Abstract: The invention relates to a fluorine-containing compound containing a substituent represented by the formula 1: where R1 is (a) a straight-chain alkylene group, (b) a branched alkylene group, (c) a cyclic structure containing an aromatic ring group or aliphatic cyclic group, or (d) a substituent containing an aromatic ring group and an aliphatic cyclic group, and R1 optionally contains fluorine, another halogen, CN, oxygen, nitrogen, silicon, or alcohol, and R2 is a hydrogen atom, a straight-chain or branched alkyl group, an aromatic group, or a hydrocarbon group optionally containing an aliphatic cyclic group, and R2 optionally contains fluorine, oxygen, nitrogen, carbonyl bond, or alcohol, and a plural number of R2 having different structures are optionally contained in the molecule.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: October 16, 2007
    Assignee: Central Glass Company Limited
    Inventors: Tadashi Narita, Kazuhiko Maeda
  • Patent number: 6922070
    Abstract: An evaluating pattern includes a conductive pattern formed on a substrate, an insulating layer which is formed on the conductive pattern, a plurality of contact holes formed in a rectangular area through the insulating layer, and a conductive material filled into the contact holes to the conductive pattern.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: July 26, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tadashi Narita
  • Publication number: 20040201093
    Abstract: An evaluating pattern includes a conductive pattern formed on a substrate, an insulating layer which is formed on the conductive pattern, a plurality of contact holes formed in a rectangular area through the insulating layer, and a conductive material filled into the contact holes to the conductive pattern.
    Type: Application
    Filed: April 29, 2004
    Publication date: October 14, 2004
    Inventor: Tadashi Narita
  • Publication number: 20040192867
    Abstract: The invention relates to a fluorine-containing compound containing a substituent represented by the formula 1: 1
    Type: Application
    Filed: January 8, 2004
    Publication date: September 30, 2004
    Applicant: CENTRAL GLASS COMPANY, LIMITED
    Inventors: Tadashi Narita, Kazuhiko Maeda
  • Patent number: 6774660
    Abstract: An evaluating pattern is comprised of a conductive pattern which has a rectangular configuration, an insulating layer which is formed on the conductive pattern, and a conductive material filled into contact holes which is formed in the insulating layer on the middle of the conductive pattern.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: August 10, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tadashi Narita
  • Publication number: 20030020510
    Abstract: An evaluating pattern is comprised of a conductive pattern which has a rectangular configuration, an insulating layer which is formed on the conductive pattern, and a conductive material filled into contact holes which is formed in the insulating layer on the middle of the conductive pattern.
    Type: Application
    Filed: September 26, 2002
    Publication date: January 30, 2003
    Inventor: Tadashi Narita
  • Patent number: 6480017
    Abstract: An evaluating pattern includes conductive pattern which has a rectangular configuration, an insulating layer which is formed on the conductive pattern, and a conductive material filled into contact holes which is formed in the insulating layer on the middle of the conductive pattern.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: November 12, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tadashi Narita
  • Publication number: 20020036505
    Abstract: An evaluating pattern is comprised of a conductive pattern which has a rectangular configuration, an insulating layer which is formed on the conductive pattern, and a conductive material filled into contact holes which is formed in the insulating layer on the middle of the conductive pattern.
    Type: Application
    Filed: January 29, 2001
    Publication date: March 28, 2002
    Inventor: Tadashi Narita
  • Patent number: 6288450
    Abstract: There is disclosed a wiring structure for a semiconductor device being excellent in the resistance against electromigration and being able to lengthen a life of the wiring. The wiring structure is comprised of a refractory metal layer and an aluminum alloy layer being stacked on the refractory metal layer. The wiring structure contains a compound layer produced between the refractory metal layer and the aluminum alloy layer. The refractory metal layer is parted in the extended direction of the wiring to prevent the compound layer produced between the refractory metal layer and the aluminum alloy layer from being ranged in the extended direction of the wiring. A length of an interval between the parted refractory metal layer portions is set to exceed a value being twice as large as a thickness of the compound layer. This prevents the compound layer growing between faces of refractory metal layer portion being opposite to each other being ranged each other.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: September 11, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Tadashi Narita, Makiko Nakamura
  • Patent number: 6171520
    Abstract: Disclosed are SH-labeling reagents containing acridine compounds represented by the following formula (I): wherein A represents the following group: —(CH2)m1— or —(CH2)m2—Q—(CH2)n— in which Q represents a group —S+RX−—, a group —N+RR1X−— wherein R1 represents an alkyl group having 1 to 6 carbon atoms or an aryl group, a group wherein R2 and R3 may be the same or different and are each independently a group —(CH2)k— (k: a number of 1 to 3) or —O(CH2CH2O)l— (l: a number of 1 to 3), m1 stands for a number of 1 to 6, m2 denotes a number of 0 to 2, n means a number of 1 to 2; R represents an alkyl group having 1 to 6 carbon atoms or an aryl group; and X− represents an anion, or intermediates thereof; preparation processes of the acridine compounds; and methods for labeling analytes by using the compounds.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: January 9, 2001
    Assignee: SS Pharmaceutical Co., Ltd.
    Inventors: Kazuhiro Imai, Hiromichi Eto, Takeshi Kotsugai, Tadashi Narita
  • Patent number: 5982037
    Abstract: In order to provide an Al/Ti layered interconnection which comprises a Ti (titanium) layer and an Al layer composed of Al (aluminum) or an Al alloy both formed over a base in this order and is capable of retarding a reaction between Ti and Al and preventing pinholes from occurring, the present invention is characterized as follows: The Al layer contains Si (silicon) in a portion adjacent to the Ti layer in a concentration capable of retarding an interface reaction between Ti and Al. Further, the concentration of Si in an Al layer portion on the side above the adjacent portion is set to a concentration lower than a concentration for allowing the upper Al layer portion to produce pinholes even at the maximum.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: November 9, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Tadashi Narita, Yusuke Harada
  • Patent number: 5707878
    Abstract: A method for detecting blood component in a sample comprising reacting a human erythrocyte membrane band 3 glycoprotein (band 3) in the sample and a hemagglutinin produced by a microorganism belonging to the genus Conidiobolus (CA) and measuring said band 3 glycoprotein contained in a complex produced by the reaction. Because band 3 can be detected specifically, at high sensitivity, and stably by the use of CA, the method ensures qualitative or quantitative, and accurate detection of human blood component in feces or contents of digestive organs, of which the determination of the presence or quantity of human blood component by hemoglobin is difficult.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: January 13, 1998
    Assignee: SS Pharmaceutical Co., Ltd.
    Inventors: Tetsuo Tomiyama, Tadashi Narita, Takeshi Kotsugai, Shigeo Narita
  • Patent number: 5576417
    Abstract: There is disclosed a method for producing aromatic polyamides represented by the following formula (III), which comprises reacting an aromatic dihalogen compound represented by the following formula (I) with a diamine compound represented by the following formula (II) in the presence of cobalt/phosphine complex and a basic substance under carbon monoxide atmosphere:X.sub.1 --Ar--X.sub.2 formula (I)wherein Ar represents an aromatic residue and X.sub.1 and X.sub.2 each represent a bromine or iodine atom,H.sub.2 N--R--NH.sub.2 formula (II)wherein R represents a divalent hydrocarbon group, andformula (III) ##STR1## wherein Ar and R each have the same meaning as the above, and n is a positive integer.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: November 19, 1996
    Assignee: Director-General of Agency of Industrial Science and Technology
    Inventors: Kazuhiko Takeuchi, Yoshihiro Kubota, Takaaki Hanaoka, Takehiko Matsuzaki, Yoshihiro Sugi, Tatsuya Eto, Tokio Hagiwara, Tadashi Narita
  • Patent number: 5308888
    Abstract: According to the present invention, there is provided a resin composition which can provide an insulating resin having excellent heat resistance and flame retardance after curing and showing a low dielectric constant.A fluorine-containing photo-setting resin composition comprising a polymer containing fluorine or a fluorine-containing group represented by general formula [II]: ##STR1## wherein R.sup.1 and R.sup.2 are selected from the group consisting of H, F, CH.sub.3 and CF.sub.3 ; R.sup.3 and R.sup.4 are selected from the group consisting of CH.sub.2 and CF.sub.2 ; x and y show 0 to 4 and m shows 30 to 1000, and a photopolymerization initiator, which is a solid at ambient temperature, melts between 100.degree. and 150.degree. C., has a melt viscosity of not greater than 10.sup.6 poise and is photocurable.
    Type: Grant
    Filed: February 22, 1993
    Date of Patent: May 3, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Shin Nishimura, Akira Nagai, Akio Takahashi, Akio Mukoo, Tadashi Narita, Tokio Hagiwara, Hiroshi Hamana, Junichi Katagiri
  • Patent number: 4876359
    Abstract: Novel .gamma.-butyrolactone derivatives having strong ACE inhibitory activity are provided. They are represented by the following general formula (I): ##STR1## wherein R.sup.1 and R.sup.2 may be the same or different and mean individually a hydrogen atom or a straight-chain or branched alkyl or cycloalkyl group, or R.sup.1 and R.sup.2 are bonded together to mean an alkylene group having 2-6 carbon atoms, R.sup.3 denotes a hydrogen atom or a lower alkyl, aralkyl, amino lower alkyl or lower alkoxycarbonylamino lower alkyl group, R.sup.4 means a lower alkyl, cycloalkyl or aralkyl group, R.sup.5 means a hydrogen atom or a lower alkyl group, or R.sub.4 and R.sub.5 are bonded together to denote an alkylene group having 2-4 carbon atoms, and R.sup.6 stands for a hydrogen atom or a lower alkyl or aralkyl group; or a pharmacologically acceptable salt thereof.
    Type: Grant
    Filed: October 1, 1987
    Date of Patent: October 24, 1989
    Assignee: SS Pharmaceutical Co., Ltd.
    Inventors: Hiroshi Hasegawa, Noriaki Shioiri, Tadashi Narita, Tatsuhiko Katori