Abstract: The present invention relates to fuse diagnosis device and method using voltage distribution, and more particularly, to fuse diagnosis device and method using voltage distribution which connect a resistor unit and a diagnostic resistor to one side of the fuse so as to be connected with the battery in parallel and calculate voltage of a battery applied to the diagnostic resistor by using the voltage distribution to diagnose a state of the fuse, in order to diagnose the states of one or more fuses connected in parallel.

Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa

Abstract: An electronic device is provided. The electronic device includes a housing, a communication circuit configured to perform short range communication with a mobile device by using a first communication channel and perform wireless communication with an external output device by using a second communication channel and a control circuit configured to, when the mobile device is located on or in close proximity to the housing, obtain content that is being output by the mobile device through the first communication channel and transmit the obtained content to the external output device through the second communication channel.

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Abstract: Disclosed is a control line diagnostic apparatus for diagnosing a control line of a driver circuit in which a driven load is driven due to a current flowing through the control line from a first high-potential node to a first low-potential node when a driving switch having a higher potential than a potential of the driven load is turned on, the control line diagnostic apparatus including a first diagnostic line having an end connected to a first node provided on the control line and the other end connected to a second high-potential node, and including a first resistor, a second resistor, and a first diode connected to one another in series, a second diagnostic line having an end connected to the first node and the other end connected to a second low-potential node, and including a third resistor, a voltage measurement unit configured to measure a voltage of a second node provided between the first and second resistors, and a control unit configured to set predetermined operation modes by controlling the driv

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.

Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Abstract: Disclosed is a control line diagnostic apparatus for diagnosing a control line of a driver circuit in which a driven load is driven due to a current flowing through the control line from a first high-potential node to a first low-potential node when a driving switch having a higher potential than a potential of the driven load is turned on, the control line diagnostic apparatus including a first diagnostic line having an end connected to a first node provided on the control line and the other end connected to a second high-potential node, and including a first resistor, a second resistor, and a first diode connected to one another in series, a second diagnostic line having an end connected to the first node and the other end connected to a second low-potential node, and including a third resistor, a voltage measurement unit configured to measure a voltage of a second node provided between the first and second resistors, and a control unit configured to set predetermined operation modes by controlling the driv

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.

Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.

Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.

Abstract: An electronic device is provided. The electronic device includes a housing, a communication circuit configured to perform short range communication with a mobile device by using a first communication channel and perform wireless communication with an external output device by using a second communication channel and a control circuit configured to, when the mobile device is located on or in close proximity to the housing, obtain content that is being output by the mobile device through the first communication channel and transmit the obtained content to the external output device through the second communication channel.

Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa

Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa

Abstract: The invention provides a method of operating a brake system, including: transmitting a valve operating command to an inlet valve an outlet valve calculating a valve operating time of each of the inlet valve and the outlet valve based on a difference in pressure between both ends of each of the inlet valve and the outlet valve; performing the linear or On-Off control for increasing pressure and calculating the quantity of brake oil passing through the inlet valve and, the ON-OFF control for decreasing pressure and calculating the quantity of brake oil passing through the outlet valve; and calculating hydraulic pressure in the wheel brake cylinder based on the quantity of brake oil passing through the inlet valve and the quantity of brake oil passing through the outlet valve.

Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.

Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.