Patents by Inventor Takaaki Fuchikami

Takaaki Fuchikami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190341109
    Abstract: Disclosed is a semiconductor memory device including a memory cell based on a static random access memory having a 6T or 4T2R configuration and including a first internal node, a second internal node, a first ferroelectric capacitor, and a second ferroelectric capacitor, the first ferroelectric capacitor and the second ferroelectric capacitor having respective first ends connected respectively to the first internal node and the second internal node. For recovering data stored in a non-volatile fashion in the first ferroelectric capacitor and the second ferroelectric capacitor, a first access transistor connected between the first internal node and a first bit line and a second access transistor connected between the second internal node and a second bit line are turned on, and respective capacitive components of the first bit line and the second bit line are used as load capacitances.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 7, 2019
    Inventors: TAKAAKI FUCHIKAMI, KAZUTAKA MIYAMOTO, HIROMITSU KIMURA, KAZUHISA UKAI
  • Patent number: 10416744
    Abstract: A data processing apparatus includes: a plurality of power supplies; a nonvolatile logic configured to be driven with power output from the plurality of power supplies; and a plurality of detection parts configured to detect output states of the plurality of power supplies, wherein the nonvolatile logic performs data processing based on a result of the detection of the plurality of detection parts.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: September 17, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami
  • Publication number: 20160334849
    Abstract: A data processing apparatus includes: a plurality of power supplies; a nonvolatile logic configured to be driven with power output from the plurality of power supplies; and a plurality of detection parts configured to detect output states of the plurality of power supplies, wherein the nonvolatile logic performs data processing based on a result of the detection of the plurality of detection parts.
    Type: Application
    Filed: April 28, 2016
    Publication date: November 17, 2016
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami
  • Patent number: 9195933
    Abstract: A counter includes: a count processing circuit including a nonvolatile register; a regulator receiving voltage from a direct current power supply, generating power supply voltage based on the received voltage for the count processing circuit, and supplying the power supply voltage to the count processing circuit; and a delay circuit receiving the power supply voltage and supplying a count signal to the count processing circuit after the power supply voltage is supplied to the count processing circuit. After having received the power supply voltage from the regulator, the count processing circuit updates a count value in response to the count signal and holds the updated count value in the nonvolatile register in a non-volatile manner.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: November 24, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Takaaki Fuchikami, Noriyuki Ema, Hiromitsu Kimura, Yoshikazu Fujimori
  • Patent number: 9100014
    Abstract: Provided is a nonvolatile storage gate embedded logic circuit embedding a nonvolatile storage gate which can hold data after power supply cutoff and can cut off a power supply at the same time shifting into a standby state. The nonvolatile storage gate embedded logic circuit includes a logic calculation unit having a logic gate, and a nonvolatile storage gate having a nonvolatile storage element, a data interface control unit disposed so as to be adjoining to the nonvolatile storage element, and receiving a nonvolatile storage control signal for data read-out from the nonvolatile storage element and data write-in to the nonvolatile storage element, and a volatile storage element disposed so as to be adjoining to the nonvolatile storage element, receiving a data input signal and a clock signal, and outputting a data output signal.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: August 4, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Patent number: 9063843
    Abstract: A data maintenance device includes: a first storage including volatile storage media; a second storage including nonvolatile storage media; an electronic circuit unit including at least one volatile register; and a selector configured to select one of the first and the second storage to be accessed by the electronic circuit unit. The selector selects the first storage in a state where data processing performed by the electronic circuit unit is ongoing, and the second storage in a state where the data processing is stopped for a shutdown of electric power of the data processing apparatus. The electronic circuit unit stores register data in the storage selected by the selector, the register data being stored in the register at the time when the data processing is stopped for the shutdown.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: June 23, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Takaaki Fuchikami
  • Publication number: 20140098926
    Abstract: A counter includes: a count processing circuit including a nonvolatile register; a regulator receiving voltage from a direct current power supply, generating power supply voltage based on the received voltage for the count processing circuit, and supplying the power supply voltage to the count processing circuit; and a delay circuit receiving the power supply voltage and supplying a count signal to the count processing circuit after the power supply voltage is supplied to the count processing circuit. After having received the power supply voltage from the regulator, the count processing circuit updates a count value in response to the count signal and holds the updated count value in the nonvolatile register in a non-volatile manner.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 10, 2014
    Applicant: Rohm Co., Ltd.
    Inventors: Takaaki FUCHIKAMI, Noriyuki EMA, Hiromitsu KIMURA, Yoshikazu Fujimori
  • Patent number: 8537259
    Abstract: A photoelectric conversion circuit includes: a photoelectric conversion element having one end to which bias voltage is applied and the other end from which photo current according to an amount of received light is output; and a photo current detecting unit clamping voltage of the other end of the photoelectric conversion element to a predetermined potential and detecting the photo current.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: September 17, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroshi Sekiguchi, Takaaki Fuchikami
  • Publication number: 20120317343
    Abstract: A data processing apparatus includes: a first storage including volatile storage media; a second storage including nonvolatile storage media; an electronic circuit unit including at least one volatile register; and a selector configured to select one of the first and the second storage to be accessed by the electronic circuit unit. The selector selects the first storage in a state where data processing performed by the electronic circuit unit is ongoing, and the second storage in a state where the data processing is stopped for a shutdown of electric power of the data processing apparatus. The electronic circuit unit stores register data in the storage selected by the selector, the register data being stored in the register at the time when the data processing is stopped for the shutdown.
    Type: Application
    Filed: June 8, 2012
    Publication date: December 13, 2012
    Applicant: ROHM CO., LTD.
    Inventor: Takaaki Fuchikami
  • Patent number: 8297120
    Abstract: An angular velocity signal detection circuit includes: a first current-voltage conversion circuit that converts, into a voltage, a current outputted from a first detection electrode of a gyroscope, and amplifies the voltage, thereby outputs a first conversion signal; a second current-voltage conversion circuit that converts, into a voltage, a current outputted from a second detection electrode of the gyroscope, and amplifies the voltage, thereby outputs a second conversion signal; an arithmetic operation unit that performs arithmetic operations by using the first conversion signal and the second conversion signal, and outputs a first processing signal and a second processing signal; and a third difference arithmetic operation circuit that amplifies a difference between the first processing signal and the second processing signal.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: October 30, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Kohei Shoji, Takaaki Fuchikami
  • Patent number: 8194432
    Abstract: By separately setting a capacitor on BL depending on whether the mode is a DRAM mode or an FRAM mode, it is compatible with improvement in a speed by BL capacitor reduction in the DRAM mode and a sufficient BL capacitance in the FRAM mode. A ferroelectric memory device includes: a plurality of bit lines BL disposed in a column direction; a plurality of word lines WL disposed in a row direction; a plurality of plate lines PL and a bit line capacitor control signal BLC; a ferroelectric memory cell (32) disposed at an intersection of the plurality of bit lines BL, the plurality of word lines WL, and the plurality of plate lines PL, and composed of a ferroelectric capacitor CF and a memory cell transistor QM; and a load capacitor adjustment cell (34) disposed at an intersection of the plurality of bit lines BL and the bit line capacitor control signal BLC, and composed of a load capacitor CL and a load capacitor adjustment transistor QL.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: June 5, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Patent number: 8125423
    Abstract: A voltage control circuit which can prevent the occurrence of imprint phenomenon is provided. In a voltage control circuit which applies voltage to a pair of electrodes including a first and a second electrode, a control unit switches the voltage applied to the pair of electrodes, in response to an operation mode of this circuit. In a normal mode, the control unit fixedly applies a first voltage to the first electrode and applies a data voltage of the first voltage or the second voltage to the second electrode, based on an instruction from the control unit. In an inversion mode, the second voltage is fixedly applied to the first electrode, and the data voltage of the first voltage or second voltage is applied to the second electrode. The control unit switches the mode between the normal mode and the inversion mode, in a predetermined cycle.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: February 28, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Takaaki Fuchikami, Yoshikazu Fujimori
  • Patent number: 8018137
    Abstract: An organic EL element (Al) includes an anode (2) and a cathode (4) which are arranged opposite to each other, and an organic layer (3) intervening between the anode (2) and the cathode (4) and including a light emitting layer (3b). The cathode (4) is made of MgAg alloy and has a thickness of not more than 200 ?. Preferably, the thickness of the cathode (4) is in the range of 40 to 100 ?.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: September 13, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Noriyuki Shimoji, Masato Moriwake, Takaaki Fuchikami, Hiroki Kato
  • Patent number: 8014186
    Abstract: A ferroelectric memory device includes: a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory; a cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks; and a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank, wherein a random access control to the ferroelectric memory is possible during each memory cycle without delay of refresh operation.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: September 6, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Publication number: 20110107836
    Abstract: An angular velocity signal detection circuit includes: a first current-voltage conversion circuit that converts, into a voltage, a current outputted from a first detection electrode of a gyroscope, and amplifies the voltage, thereby outputs a first conversion signal; a second current-voltage conversion circuit that converts, into a voltage, a current outputted from a second detection electrode of the gyroscope, and amplifies the voltage, thereby outputs a second conversion signal; an arithmetic operation unit that performs arithmetic operations by using the first conversion signal and the second conversion signal, and outputs a first processing signal and a second processing signal; and a third difference arithmetic operation circuit that amplifies a difference between the first processing signal and the second processing signal.
    Type: Application
    Filed: August 28, 2007
    Publication date: May 12, 2011
    Applicant: Rohm Co., Ltd.
    Inventors: Kohei Shoji, Takaaki Fuchikami
  • Publication number: 20110010493
    Abstract: Provided is a nonvolatile storage gate embedded logic circuit embedding a nonvolatile storage gate which can hold data after power supply cutoff and can cut off a power supply at the same time shifting into a standby state. The nonvolatile storage gate embedded logic circuit includes a logic calculation unit having a logic gate, and a nonvolatile storage gate having a nonvolatile storage element, a data interface control unit disposed so as to be adjoining to the nonvolatile storage element, and receiving a nonvolatile storage control signal for data read-out from the nonvolatile storage element and data write-in to the nonvolatile storage element, and a volatile storage element disposed so as to be adjoining to the nonvolatile storage element, receiving a data input signal and a clock signal, and outputting a data output signal.
    Type: Application
    Filed: January 8, 2009
    Publication date: January 13, 2011
    Applicant: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Publication number: 20100321975
    Abstract: By separately setting a capacitor on BL depending on whether the mode is a DRAM mode or an FRAM mode, it is compatible with improvement in a speed by BL capacitor reduction in the DRAM mode and a sufficient BL capacitance in the FRAM mode. A ferroelectric memory device includes: a plurality of bit lines BL disposed in a column direction; a plurality of word lines WL disposed in a row direction; a plurality of plate lines PL and a bit line capacitor control signal BLC; a ferroelectric memory cell (32) disposed at an intersection of the plurality of bit lines BL, the plurality of word lines WL, and the plurality of plate lines PL, and composed of a ferroelectric capacitor CF and a memory cell transistor QM; and a load capacitor adjustment cell (34) disposed at an intersection of the plurality of bit lines BL and the bit line capacitor control signal BLC, and composed of a load capacitor CL and a load capacitor adjustment transistor QL.
    Type: Application
    Filed: January 8, 2009
    Publication date: December 23, 2010
    Applicant: Rohm Co., Ltd
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Publication number: 20100123812
    Abstract: A photoelectric conversion circuit (P11-Pmn) includes: a photoelectric conversion element (PD) having one end to which bias voltage is applied and the other end from which photo current according to an amount of received light is output; and a photo current detecting unit (11-13) clamping voltage of the other end of the photoelectric conversion element (PD) to a predetermined potential and detecting the photo current.
    Type: Application
    Filed: August 18, 2008
    Publication date: May 20, 2010
    Applicant: Rohm Co., Ltd.
    Inventors: Hiroshi Sekiguchi, Takaaki Fuchikami
  • Publication number: 20090268504
    Abstract: A ferroelectric memory device includes: a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory; a cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks; and a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank, wherein a random access control to the ferroelectric memory is possible during each memory cycle without delay of refresh operation.
    Type: Application
    Filed: April 23, 2009
    Publication date: October 29, 2009
    Applicant: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
  • Publication number: 20090102358
    Abstract: An organic EL element (Al) includes an anode (2) and a cathode (4) which are arranged opposite to each other, and an organic layer (3) intervening between the anode (2) and the cathode (4) and including a light emitting layer (3b). The cathode (4) is made of MgAg alloy and has a thickness of not more than 200 ?. Preferably, the thickness of the cathode (4) is in the range of 40 to 100 ?.
    Type: Application
    Filed: June 6, 2006
    Publication date: April 23, 2009
    Applicant: ROHM CO., LTD.
    Inventors: Noriyuki Shimoji, Masato Moriwake, Takaaki Fuchikami, Hiroki Kato