Patents by Inventor Takahiro Kataoka

Takahiro Kataoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11926375
    Abstract: A steering control device includes an electronic control unit. The electronic control unit is configured to acquire a limit position determination angle corresponding to an absolute steering angle when it is determined that movement of a turning shaft is limited, to compare a first stroke width which is a sum of an absolute value of the limit position determination angle on a right side and an absolute value of the limit position determination angle on a left side with a stroke threshold value corresponding to an entire stroke range of the turning shaft when the limit position determination angles on the right and left sides are acquired, and to set end-position-corresponding angles on the right and left sides based on the limit position determination angles on the right and left sides when the first stroke width is greater than the stroke threshold value.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: March 12, 2024
    Assignee: JTEKT CORPORATION
    Inventors: Takahiro Toko, Nobuaki Kataoka, Takafumi Yamaguchi, Yukinobu Ezaki
  • Patent number: 11919581
    Abstract: A steering control device includes an electronic control unit. The electronic control unit is configured to perform end contact relaxation control for correcting a current command value such that a decrease of an end separation angle indicating a distance of an absolute steering angle from an end-position-corresponding angle is limited when the end separation angle is equal to or less than a predetermined angle and to perform partial release control for decreasing a correction value of the current command value due to execution of the end contact relaxation control based on a steering torque which is input to a steering system when a vehicle is intended to travel while turning at the time of execution of the end contact relaxation control.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: March 5, 2024
    Assignee: JTEKT CORPORATION
    Inventors: Takafumi Yamaguchi, Takahiro Toko, Nobuaki Kataoka, Shingo Nitta, Yukinobu Ezaki
  • Patent number: 11211835
    Abstract: There is provided a method for controlling a wireless power supply system including a wireless power transmitting device and a wireless power receiving device. The method includes: transmitting predetermined first information by non-encryption communication from a first device, which is one of the wireless power receiving device and the wireless power transmitting device, to a second device, which is the other of the wireless power receiving device and the wireless power transmitting device; transmitting the first information by encryption communication from the first device to the second device; and prohibiting, in the second device, a specific power supply mode when the first information received by the non-encryption communication does not match the first information received by the encryption communication.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: December 28, 2021
    Assignee: ROHM CO., LTD.
    Inventor: Takahiro Kataoka
  • Publication number: 20200127503
    Abstract: There is provided a method for controlling a wireless power supply system including a wireless power transmitting device and a wireless power receiving device. The method includes: transmitting predetermined first information by non-encryption communication from a first device, which is one of the wireless power receiving device and the wireless power transmitting device, to a second device, which is the other of the wireless power receiving device and the wireless power transmitting device; transmitting the first information by encryption communication from the first device to the second device; and prohibiting, in the second device, a specific power supply mode when the first information received by the non-encryption communication does not match the first information received by the encryption communication.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventor: Takahiro KATAOKA
  • Patent number: 7532994
    Abstract: A test apparatus for testing an electronic device by providing test signals to the electronic device and comparing multiple output signals with respective anticipated values is disclosed, the test apparatus including: a reference timing detecting unit for detecting that one of the output signals has changed; a setting unit for setting beforehand a minimum time from changing of the output signal to changing of another output signal; an acquisition unit for acquiring the value of the latter output signal at a timing at which the minimum time has elapsed from detection of change of the former output signal; and a determination unit for determining the electronic device to be defective in the event that the value of the latter output signal thus acquired does not match the value which the latter output signal should assume following elapsing of the minimum time.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: May 12, 2009
    Assignee: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka, Hiroyuki Sekiguchi
  • Patent number: 7506291
    Abstract: A test emulator for emulating a test of a semiconductor device is provided. The test emulator includes a test pattern providing means for providing a test pattern to a device simulator which simulates the operation of a semiconductor device, an expected value storage means for associating a comparison timing at which an output signal outputted from the device simulator according to the test pattern is compared with an predetermined expected value with the expected value at the comparison timing and previously storing therein the same, a margin determination means for determining the size of a margin between which the output signal corresponds to the expected value when the output signal corresponds to the expected value at the comparison timing and a notification means for notifying a user that the margin at the comparison timing is small when the size of margin is smaller than a reference value.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: March 17, 2009
    Assignee: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka
  • Patent number: 7502724
    Abstract: A test simulator for simulating a test of a semiconductor device is disclosed, the test simulator including: a test pattern holding unit for holding an existing test pattern to be supplied to the semiconductor device; a device output holding unit for preliminarily holding an output to be obtained from the semiconductor device when the existing test pattern is supplied; a test pattern generating unit for generating a new test pattern to be supplied to the semiconductor device; a test pattern deciding unit for deciding whether the new test pattern is equal to the existing test pattern; and a simulation skipping unit for skipping at least a part of a simulation test by reading an output from the device output holding unit and using the output as an output for the new test pattern without supplying the new test pattern to the semiconductor device when the test patterns are equal to each other.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 10, 2009
    Assignee: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka
  • Patent number: 7269773
    Abstract: A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: September 11, 2007
    Assignee: Advantest Corporation
    Inventors: Mitsuo Hori, Hideki Tada, Takahiro Kataoka, Hiroyuki Sekiguchi, Kazuo Mukawa
  • Publication number: 20060248390
    Abstract: A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.
    Type: Application
    Filed: August 24, 2005
    Publication date: November 2, 2006
    Applicant: Advantest Corporation
    Inventors: Mitsuo Hori, Hideki Tada, Takahiro Kataoka, Hiroyuki Sekiguchi, Kazuo Mukawa
  • Publication number: 20060247882
    Abstract: Acceptability of an electronic device is determined with higher precision by performing testing regarding correlation of the timing at which multiple output signals output from the electronic device change.
    Type: Application
    Filed: March 31, 2006
    Publication date: November 2, 2006
    Applicant: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka, Hiroyuki Sekiguchi
  • Publication number: 20060085682
    Abstract: There is provided a test simulator simulating a test of a semiconductor device, which includes: a test pattern holding means for holding an existing test pattern to be supplied to the semiconductor device; a device output holding means for previously holding an output to be obtained from the semiconductor device when the existing test pattern is supplied; a test pattern generating means for generating a new test pattern to be supplied to the semiconductor device; a test pattern deciding means for deciding whether the new test pattern is equal to the existing test pattern; and a simulation skipping means for skipping at least a part of a simulation test by reading an output from the device output holding means and using the output as an output for the new test pattern without supplying the new test pattern to the semiconductor device when the test patterns are equal to each other.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 20, 2006
    Applicant: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka
  • Publication number: 20060064607
    Abstract: A test emulator for emulating a test of a semiconductor device is provided. The test emulator includes a test pattern providing means for providing a test pattern to a device simulator which simulates the operation of a semiconductor device, an expected value storage means for associating a comparison timing at which an output signal outputted from the device simulator according to the test pattern is compared with an predetermined expected value with the expected value at the comparison timing and previously storing therein the same, a margin determination means for determining the size of a margin between which the output signal corresponds to the expected value when the output signal corresponds to the expected value at the comparison timing and a notification means for notifying a user that the margin at the comparison timing is small when the size of margin is smaller than a reference value.
    Type: Application
    Filed: August 24, 2005
    Publication date: March 23, 2006
    Applicant: Advantest Corporation
    Inventors: Hideki Tada, Mitsuo Hori, Takahiro Kataoka
  • Patent number: 6739996
    Abstract: An endless tension belt is formed by spirally winding a tension member comprising a cord that serves as a core coated with a rubber-like resilient material in such a manner that flat clamp faces of adjacent tension members are pressedly joined with respect to each other.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: May 25, 2004
    Assignee: Sumitomo Rubber Industries, Ltd.
    Inventors: Yoshio Ueno, Tomohisa Yoshida, Takahiro Kataoka
  • Publication number: 20030234067
    Abstract: A rubber composition is disclosed that contains 5 to 100 phr of a bloom compound, 30 to 100 phr of a white filler, and at most 10 phr of a black filler, wherein the bloom compound preferably contains at least one compound selected from the group consisting of an aromatic amine compound, an aliphatic compound, and an organometallic compound. A tire using the rubber composition for a tread portion and/or a sidewall portion of the tire is also disclosed.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 25, 2003
    Inventors: Takahiro Kataoka, Kunihiko Shimizu
  • Publication number: 20030008744
    Abstract: An endless tension belt is formed by spirally winding a tension member comprising a cord that serves as a core coated with a rubber-like resilient material in such a manner that flat clamp faces of adjacent tension members are pressedly joined with respect to each other.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 9, 2003
    Inventors: Yoshio Ueno, Tomohisa Yoshida, Takahiro Kataoka
  • Publication number: 20020193980
    Abstract: A semiconductor test program debugging apparatus is provided which generates, in a simulatory manner, a signal that a DUT should output when receiving a test signal, and which generates, in a simulatory manner, an analog waveform that should be output from the analog output terminal, when an analog waveform acquisition instruction that is included in a semiconductor test program has been executed.
    Type: Application
    Filed: May 8, 2002
    Publication date: December 19, 2002
    Inventors: Shinsaku Higashi, Takahiro Kataoka
  • Patent number: 6434995
    Abstract: There is provided means for bending a small diameter metal pipe capable of accurately finishing all of bending operation by a single bender even when a linear length of a pipe distal end portion is short. A method of bending a small diameter metal pipe for chucking one end of the small diameter metal pipe to be worked, setting a working direction and carrying out bending operation from a front end side of other end to the one end, characterized in that bending operation of one step or several steps is carried out previously from a pipe distal end of the one end, a portion subjected to the bending operation is chucked and bending operation is successively carried out from the front end side of the other end toward the one end subjected to the bending operation under the state.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: August 20, 2002
    Assignee: Usui Kokusai Sangyo Kaisha Limited
    Inventors: Takahiro Kataoka, Masaki Hoshino
  • Patent number: 5548078
    Abstract: A fungicidal composition for agricultural use, which comprises a compound of the formula: ##STR1## wherein R.sup.1 and R.sup.2 are each hydrogen, lower alkyl or cyclo(lower)alkyl; R.sup.3 is lower alkyl or cyclo(lower)alkyl; R.sup.4 and R.sup.5 are each hydrogen, lower alkyl, lower alkoxy, halogen-substituted lower alkyl, lower alkyl-substituted silyl, halogen or nitro; A represents an unsaturated hydrocarbon group, a halogen-substituted unsaturated hydrocarbon group, a phenyl group or a heterocyclic group, among which the phenyl group and the heterocyclic group may be optionally substituted with not more than three substituents; and Z is --CH.sub.2 --, --CH(OH)--, --CO--, --O--, --S--, --NR-- (R being hydrogen or lower alkyl), --CH.sub.2 CH.sub.2 --, --CH.dbd.CH--, ##STR2## --CH.sub.2 O--, --CH.sub.2 S--, --CH.sub.2 SO--, --OCH.sub.2 --, --SCH.sub.2 -- or --SOCH.sub.2 --.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: August 20, 1996
    Assignee: Shionogi Seiyaku Kabushiki Kaisha
    Inventors: Yoshio Hayase, Takahiro Kataoka, Hideyuki Takenaka, Mitsuhiro Ichinari, Michio Masuko, Toshio Takahashi, Norihiko Tanimoto
  • Patent number: 5401877
    Abstract: A fungicidal composition for agricultural use, which comprises a compound of the formula: ##STR1## wherein R.sup.1 and R.sup.2 are each hydrogen, lower alkyl or cyclo(lower)alkyl; R.sup.3 is lower alkyl or cyclo(lower)alkyl; R.sup.4 and R.sup.5 are each hydrogen, lower alkyl, lower alkoxy, halogen-substituted lower alkyl, lower alkyl-substituted sibyl, halogen or nitro; A represents an unsaturated hydrocarbon group, a halogen-substituted unsaturated hydrocarbon group, a phenyl group or a heterocyclic group, among which the phenyl group and the heterocyclic group may be optionally substituted with not more than three substituents; and Z is --CH.sub.2 --, --CH(OH)--, --CO--, --O--, --S--, --NR-- (R being hydrogen or lower alkyl), --CH.sub.2 CH.sub.2 --, --CH=CH--, ##STR2## --CH.sub.2 O--, --CH.sub.2 S--, --CH.sub.2 SO--, --OCH.sub.2 --, --SCH.sub.2 -- or --SOCH.sub.2 --.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: March 28, 1995
    Assignee: Shionogi Seiyaku Kabushiki Kaisha
    Inventors: Yoshio Hayase, Takahiro Kataoka, Hideyuki Takenaka, Mitsuhiro Ichinari, Michio Masuko, Toshio Takahashi, Norihiko Tanimoto
  • Patent number: 5371222
    Abstract: A fungicidal composition for agricultural use, which comprises a compound of the formula: ##STR1## wherein R.sup.1 and R.sup.2 are each hydrogen, lower alkyl or cyclo(lower)alkyl; R.sup.3 is lower alkyl or cyclo(lower)alkyl; R.sup.4 and R.sup.5 are each hydrogen, lower alkyl, lower alkoxy, halogen-substituted lower alkyl, lower alkyl-substituted silyl, halogen or nitro; A represents an unsaturated hydrocarbon group, a halogen-substituted unsaturated hydrocarbon group, a phenyl group or a heterocyclic group, among which the phenyl group and the heterocyclic group may be optionally substituted with not more than three substituents; and Z is --CH.sub.2 --, --CH(OH)--, --CO--, --O--, --S--, --NR-- (R being hydrogen or lower alkyl), --CH.sub.2 CH.sub.2 --, --CH.dbd.CH--, ##STR2## --CH.sub.2 O--, --CH.sub.2 S--, --CH.sub.2 SO--, --OCH.sub.2 --, --SCH.sub.2 -- or --SOCH.sub.2 --.
    Type: Grant
    Filed: October 16, 1992
    Date of Patent: December 6, 1994
    Assignee: Shionogi Seiyaku Kabushiki Kaisha
    Inventors: Yoshio Hayase, Takahiro Kataoka, Hideyuki Takenaka, Mitsuhiro Ichinari, Michio Masuko, Toshio Takahashi, Norihiko Tanimoto