Patents by Inventor Takahiro Nomiyama

Takahiro Nomiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200321917
    Abstract: A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.
    Type: Application
    Filed: May 28, 2020
    Publication date: October 8, 2020
    Inventors: Takahiro Nomiyama, Ji-seon Paek, Dong-su Kim
  • Publication number: 20200244180
    Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: TAKAHIRO NOMIYAMA, Sung Woo Moon, Yus Ko
  • Patent number: 10686407
    Abstract: A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: June 16, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Takahiro Nomiyama, Ji-seon Paek, Dong-su Kim
  • Publication number: 20200136513
    Abstract: According to some example embodiments, an apparatus includes a buck-boost converter, a first buck converter connected at an output terminal of the buck-boost converter, a second buck converter connected at the output terminal of the buck-boost converter, a first LA including a first supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the first buck converter, where the first LA is configured to provide a first modulated supply voltage to a first PA of a first transmitter, and a second LA including a second supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the second buck converter, where the second LA is configured to provide a second modulated supply voltage to a second PA of a second transmitter.
    Type: Application
    Filed: December 30, 2019
    Publication date: April 30, 2020
    Inventors: Yongsik Youn, Takahiro Nomiyama, Younghwan Choo, Dongsu Kim
  • Patent number: 10622910
    Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Takahiro Nomiyama, Sung Woo Moon, Yus Ko
  • Patent number: 10523120
    Abstract: According to some example embodiments, an apparatus includes a buck-boost converter, a first buck converter connected at an output terminal of the buck-boost converter, a second buck converter connected at the output terminal of the buck-boost converter, a first LA including a first supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the first buck converter, where the first LA is configured to provide a first modulated supply voltage to a first PA of a first transmitter, and a second LA including a second supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the second buck converter, where the second LA is configured to provide a second modulated supply voltage to a second PA of a second transmitter.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: December 31, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yongsik Youn, Takahiro Nomiyama, Younghwan Choo, Dongsu Kim
  • Publication number: 20190334750
    Abstract: A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.
    Type: Application
    Filed: December 27, 2018
    Publication date: October 31, 2019
    Inventors: TAKAHIRO NOMIYAMA, Dong-su KIM, Ji-seon PAEK
  • Publication number: 20190334480
    Abstract: A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 31, 2019
    Inventors: Takahiro Nomiyama, Ji-seon Paek, Dong-su Kim
  • Publication number: 20190074769
    Abstract: According to some example embodiments, an apparatus includes a buck-boost converter, a first buck converter connected at an output terminal of the buck-boost converter, a second buck converter connected at the output terminal of the buck-boost converter, a first LA including a first supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the first buck converter, where the first LA is configured to provide a first modulated supply voltage to a first PA of a first transmitter, and a second LA including a second supply voltage input connected to the output terminal of the buck-boost converter, and an output terminal connected to an output terminal of the second buck converter, where the second LA is configured to provide a second modulated supply voltage to a second PA of a second transmitter.
    Type: Application
    Filed: August 1, 2018
    Publication date: March 7, 2019
    Inventors: Yongsik Youn, Takahiro Nomiyama, Younghwan Choo, Dongsu Kim
  • Publication number: 20180205324
    Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.
    Type: Application
    Filed: November 3, 2017
    Publication date: July 19, 2018
    Inventors: TAKAHIRO NOMIYAMA, SUNG WOO MOON, YUS KO
  • Patent number: 9768695
    Abstract: A power converting circuit includes a voltage converting circuit, a feedback circuit, a driving signal generator, a transient state detector, and a resistance value adjuster. The voltage converting circuit changes a voltage level of an input voltage responsive to a driving signal, and outputs an output voltage according to the changed voltage level of the input voltage. The feedback circuit divides the output voltage to output the divided output voltage as a feedback voltage. The driving signal generator compares a level of the feedback voltage with a level of a reference voltage and outputs the driving signal. The transient state detector compares the level of the feedback voltage with the level of the reference voltage and outputs a transient state signal corresponding to a transient state of the output voltage. The resistance value adjuster adjusts the feedback resistance value, which divides the output voltage, responsive to the transient state signal.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: September 19, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Takahiro Nomiyama, Ilyoung Sohn, Suho Lee, Minsoo Cho, Jaeyeol Han
  • Patent number: 9667239
    Abstract: A voltage regulator includes a high duty cycle detector, a feedback controller, a hysteretic comparator, and first and second drivers. The high duty cycle detector generates a high duty cycle signal based on a power supply voltage and a reference voltage. The feedback controller generates first and second feedback voltages based on the reference voltage, the high duty cycle signal and an output voltage of the voltage regulator. The hysteretic comparator compares the reference voltage and the first feedback voltage to generate a control signal. When the first feedback voltage is activated, the first driver drives an output node that provides the output voltage based on the control signal and the high duty cycle signal. When the second feedback voltage is activated, the second driver generates a third voltage proportional to the reference voltage based on the power supply voltage and the second feedback voltage, and drives the output node with the third voltage.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: May 30, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Takahiro Nomiyama, Dong-Jin Keum, Hoang Quoc Duong, Jae-Yeol Han
  • Publication number: 20170085256
    Abstract: A voltage regulator includes a high duty cycle detector, a feedback controller, a hysteretic comparator, and first and second drivers. The high duty cycle detector generates a high duty cycle signal based on a power supply voltage and a reference voltage. The feedback controller generates first and second feedback voltages based on the reference voltage, the high duty cycle signal and an output voltage of the voltage regulator. The hysteretic comparator compares the reference voltage and the first feedback voltage to generate a control signal. When the first feedback voltage is activated, the first driver drives an output node that provides the output voltage based on the control signal and the high duty cycle signal. When the second feedback voltage is activated, the second driver generates a third voltage proportional to the reference voltage based on the power supply voltage and the second feedback voltage, and drives the output node with the third voltage.
    Type: Application
    Filed: June 2, 2016
    Publication date: March 23, 2017
    Inventors: TAKAHIRO NOMIYAMA, DONG-JIN KEUM, HOANG QUOC DUONG, JAE-YEOL HAN
  • Publication number: 20160336858
    Abstract: A power converting circuit includes a voltage converting circuit, a feedback circuit, a driving signal generator, a transient state detector, and a resistance value adjuster. The voltage converting circuit changes a voltage level of an input voltage in response to a driving signal, and outputs an output voltage according to the changed voltage level of the input voltage. The feedback circuit divides the output voltage to output the divided output voltage as a feedback voltage. The driving signal generator compares a level of the feedback voltage with a level of a reference voltage and outputs the driving signal. The transient state detector compares the level of the feedback voltage with the level of the reference voltage and outputs a transient state signal corresponding to a transient state of the output voltage. The resistance value adjuster adjusts the feedback resistance value, which divides the output voltage, in response to the transient state signal.
    Type: Application
    Filed: April 19, 2016
    Publication date: November 17, 2016
    Inventors: TAKAHIRO NOMIYAMA, ILYOUNG SOHN, SUHO LEE, MINSOO CHO, JAEYEOL HAN
  • Patent number: 9257907
    Abstract: A switching loss is reduced by reducing a deviation from the operational principle of zero-volt switching (ZVS). A semiconductor integrated circuit includes high-side switch elements Q11 and Q12, a low-side switch element Q2, and a controller CNT. A decoupling capacitance Cin is coupled between one end of a high-side element and an earth potential, and the high-side element includes the first and second transistors Q11 and Q12 coupled in parallel. In changing the high-side elements from an on-state to an off-state, CNT controls Q12 from an on-state to an off-state by delaying Q12 relative to Q11. Q11 and Q12 are divided into a plurality of parts inside a semiconductor chip Chip 1, a plurality of partial first transistors formed by dividing Q11 and a plurality of partial second transistors formed by dividing Q12 are alternately arranged in an arrangement direction of Q11 and Q12, inside the semiconductor chip Chip 1.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 9, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Takahiro Nomiyama, Koji Tateno, Daisuke Kondo
  • Publication number: 20150280571
    Abstract: Disclosed is a power conversion circuit that suppresses the flow of a through current to a switching element based on a normally-on transistor. The power conversion circuit includes a high-side transistor and a low-side transistor, which are series-coupled to each other to form a half-bridge circuit, and two drive circuits, which complementarily drive the gate of the high-side transistor and of the low-side transistor. The high-side transistor is a normally-off transistor. The low-side transistor is a normally-on transistor.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 1, 2015
    Inventors: Koji TATENO, Takahiro NOMIYAMA, Yoshinao MIURA, Hideo ISHII
  • Patent number: 9083257
    Abstract: Disclosed is a power conversion circuit that suppresses the flow of a through current to a switching element based on a normally-on transistor. The power conversion circuit includes a high-side transistor and a low-side transistor, which are series-coupled to each other to form a half-bridge circuit, and two drive circuits, which complementarily drive the gate of the high-side transistor and of the low-side transistor. The high-side transistor is a normally-off transistor. The low-side transistor is a normally-on transistor.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: July 14, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Koji Tateno, Takahiro Nomiyama, Yoshinao Miura, Hideo Ishii
  • Publication number: 20140176093
    Abstract: A switching loss is reduced by reducing a deviation from the operational principle of zero-volt switching (ZVS). A semiconductor integrated circuit includes high-side switch elements Q11 and Q12, a low-side switch element Q2, and a controller CNT. A decoupling capacitance Cin is coupled between one end of a high-side element and an earth potential, and the high-side element includes the first and second transistors Q11 and Q12 coupled in parallel. In changing the high-side elements from an on-state to an off-state, CNT controls Q12 from an on-state to an off-state by delaying Q12 relative to Q11. Q11 and Q12 are divided into a plurality of parts inside a semiconductor chip Chip 1, a plurality of partial first transistors formed by dividing Q11 and a plurality of partial second transistors formed by dividing Q12 are alternately arranged in an arrangement direction of Q11 and Q12, inside the semiconductor chip Chip 1.
    Type: Application
    Filed: October 28, 2013
    Publication date: June 26, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Takahiro NOMIYAMA, Koji TATENO, Daisuke KONDO
  • Publication number: 20130076322
    Abstract: Disclosed is a power conversion circuit that suppresses the flow of a through current to a switching element based on a normally-on transistor. The power conversion circuit includes a high-side transistor and a low-side transistor, which are series-coupled to each other to form a half-bridge circuit, and two drive circuits, which complementarily drive the gate of the high-side transistor and of the low-side transistor. The high-side transistor is a normally-off transistor. The low-side transistor is a normally-on transistor.
    Type: Application
    Filed: July 31, 2012
    Publication date: March 28, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Koji TATENO, Takahiro NOMIYAMA, Yoshinao MIURA, Hideo ISHII
  • Patent number: 7983056
    Abstract: In a semiconductor device provided with terminals for external connection, input terminals, power supply terminals and ground terminals are disposed close together on part of one edge portion of two opposing edge portions. Output terminals are disposed in the vicinity of both ends of the one edge portion and on another edge portion of the two edge portions. A ground wiring is routed from the other edge portion and connected to the ground terminals. In so doing, elemental devices connected to the input terminals are disposed close together, whereby needless gaps do not arise between the elemental devices. A ground potential is also supplied by the ground wiring.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: July 19, 2011
    Assignees: Fuji Electric Systems Co., Ltd., LG Electronics Inc.
    Inventor: Takahiro Nomiyama