Patents by Inventor Takahiro Toma

Takahiro Toma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240406453
    Abstract: An encoder which transforms a current block to be encoded in an image to encode the current block includes circuitry and memory. The circuitry, using the memory: determines a plurality of first transform basis candidates and transforms the current block using a transform basis included in the plurality of first transform basis candidates determined, when the current block has a first size; and determines one or more second transform basis candidates different from the plurality of first transform basis candidates and transforms the current block using a transform basis included in the one or more second transform basis candidates determined, when the current block has a second size larger than the first size.
    Type: Application
    Filed: August 14, 2024
    Publication date: December 5, 2024
    Inventors: Ryuichi KANOH, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi, Masato Ohkawa, Hideo Saitou
  • Publication number: 20240406381
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry switches between storing and not storing of a decoded picture buffer (DPB) parameter related to a DPB in a common header shared between layers in layer groups each including at least one output layer, according to whether or not all the layer groups in a bitstream each include only one layer.
    Type: Application
    Filed: August 9, 2024
    Publication date: December 5, 2024
    Inventors: Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE
  • Publication number: 20240406414
    Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.
    Type: Application
    Filed: August 16, 2024
    Publication date: December 5, 2024
    Inventors: Masato OHKAWA, Hideo Saitou, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 12160600
    Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: December 3, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Sughosh Pavan Shashidhar, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi
  • Patent number: 12160614
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: encodes a video using (i) a decoding parameter set (DPS) which is identified based on presence of the DPS in a bitstream and (ii) a sequence parameter set (SPS) which is identified based on an identifier for the SPS.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: December 3, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 12160602
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: stores MV information and correction processing information into a FIFO buffer for an HMVP mode in association, the MV information being derived for a processed block and correction processing information being related to correction processing of a prediction image of the processed block; registers, in a prediction candidate list for a merge mode, one or more prediction candidates each being a combination of MV information and correction processing information, the prediction candidates including a prediction candidate which is a combination of the motion vector information and the correction processing information stored in the FIFO buffer; and selects a prediction candidate from the prediction candidate list when a current block is to be processed in the merge mode, and performs correction processing of a prediction image of the current block, based on the correction processing information.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: December 3, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240397110
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines whether or not a current video to be processed is a progressive video. When it is determined that the current video is a progressive video, the encoder encodes, into a bitstream, one syntax element indicating a chroma location type which is information indicating locations of chroma samples relative to luma samples for a frame included in the current video. When it is determined that the current video is not a progressive video, the encoder encodes two syntax elements into the bitstream, each of which indicates the chroma location type for a different one of fields of two types included in the current video.
    Type: Application
    Filed: August 6, 2024
    Publication date: November 28, 2024
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20240397047
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry in operation: determines whether the shape of a current chroma block to be split satisfies a first condition; generates one or more second candidates for a block partitioning method by eliminating one or more predetermined candidates from a plurality of first candidates for a block partitioning method when the current chroma block satisfies the first condition; selects a block partitioning method from among the one or more second candidates; and splits the current chroma block according to the block partitioning method selected.
    Type: Application
    Filed: August 6, 2024
    Publication date: November 28, 2024
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Kiyofumi ABE, Takahiro NISHI
  • Publication number: 20240388707
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 12149745
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, for a group of layers including at least one output layer, the circuitry generates a bitstream including a common header for one or more layers in the group of layers, in which when a total number of layers in the group of layers is 1, (i) performance requirement information indicating a performance requirement for a decoder is signaled in the common header, and (ii) a hypothetical reference decoder (HRD) parameter is not signaled in the common header. The bitstream includes the common header and encoded data of at least one image in the at least one output layer. The common header does not include the HRD parameter.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: November 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Yusuke Kato
  • Patent number: 12149701
    Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
    Type: Grant
    Filed: September 14, 2023
    Date of Patent: November 19, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12148187
    Abstract: A three-dimensional data creation method in a client device includes: creating three-dimensional data of a surrounding area of the client device using sensor information that is obtained through a sensor equipped in the client device and indicates a surrounding condition of the client device; estimating a self-location of the client device using the three-dimensional data created; and transmitting the sensor information obtained to a server or an other client device.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: November 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Toshiyasu Sugio, Takahiro Nishi, Tadamasa Toma, Toru Matsunobu, Satoshi Yoshikawa, Tatsuya Koyama
  • Patent number: 12149686
    Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. The processing circuitry is configured to: select a filter based at least on a prediction mode used for a first block, the filter including first filter coefficients for the first block and second filter coefficients for a second block; multiply values of first pixels among the first block and second pixels among the second block by the first filter coefficients to change a value of a first pixel in the first pixels; and multiply the values of the first pixels among the first block and the second pixels among the second block by the second filter coefficients to change a value of a second pixel in the second pixels.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: November 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12149723
    Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.
    Type: Grant
    Filed: September 15, 2023
    Date of Patent: November 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20240380919
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240380925
    Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry stores a total number of temporal sub-layers in a bitstream Into either a picture timing supplemental enhancement information (SEI) message or a buffering period SEI message, and encodes the total number of the temporal sub-layers.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20240380920
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240380886
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Han Boon Teo, Hai Wei Sun, Chong Soon Lim, Jing Ya Li, Chu Tong Wang, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240380921
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Kiyofumi ABE, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240380917
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA