Patents by Inventor Takahiro Toyoshima
Takahiro Toyoshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088183Abstract: Provided is a solid-state imaging device capable of obtaining an image with a higher image quality. The solid-state imaging device includes a substrate, a pixel region formed on the substrate and configured such that a plurality of pixels is arrayed therein, a dug structure formed in the pixel region, and a p-type semiconductor region formed in a region adjacent to the dug structure in the substrate. Further, the pixel region is divided into an effective pixel region where effective pixels including photoelectric conversion units not shielded from light are arrayed and an OPB pixel region formed adjacent to the effective pixel region and configured such that light shielding pixels including photoelectric conversion units shielded from light are arrayed therein. In addition, in plan view, the percentage of an area occupied by the dug structure in the OPB pixel region is smaller than the percentage of an area occupied by the dug structure in the effective pixel region.Type: ApplicationFiled: December 17, 2021Publication date: March 14, 2024Inventor: TAKAHIRO TOYOSHIMA
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Patent number: 11798962Abstract: The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.Type: GrantFiled: February 12, 2021Date of Patent: October 24, 2023Assignee: SONY CORPORATIONInventors: Hideo Kido, Masahiro Tada, Takahiro Toyoshima, Yasushi Tateshita, Hikaru Iwata
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Patent number: 11648712Abstract: An imprint apparatus that forms a pattern on a substrate by using a mold, the apparatus comprises a supply unit configured to supply an imprint material to the substrate; a contact unit configured to contact the imprint material that has been supplied to the substrate with a mold; a substrate stage configured to move the substrate; a gas supply unit that is provided between the supply unit and the contact unit, and supply gas toward the substrate; and a flow volume adjustment unit configured to adjust a flow volume of the gas that is supplied from the gas supply unit, while the substrate stage moves the substrate from a supply position at which the imprint material is supplied by the supply unit to a contact position at which the imprint material is contacted with the mold by the contact unit.Type: GrantFiled: November 12, 2020Date of Patent: May 16, 2023Assignee: CANON KABUSHIKI KAISHAInventor: Takahiro Toyoshima
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Publication number: 20220344386Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: July 6, 2022Publication date: October 27, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
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Patent number: 11424281Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: GrantFiled: August 7, 2020Date of Patent: August 23, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Jun Ogi, Yoshiaki Tashiro, Takahiro Toyoshima, Yorito Sakano, Yusuke Oike, Hongbo Zhu, Keiichi Nakazawa, Yukari Takeya, Atsushi Okuyama, Yasufumi Miyoshi, Ryosuke Matsumoto, Atsushi Horiuchi
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Patent number: 11372328Abstract: To perform efficient releasing even if a force applied to the mold is reduced, provided is a mold which is used in an imprinting apparatus, for molding an imprinting material by imprinting the imprinting material on a substrate with an imprinting surface of the mold, and is released by applying a force in a releasing direction to a peeling region near an outer periphery of the mold, wherein a flexibility of the peeling region of the mold is higher than that of other portions near the outer periphery of the mold.Type: GrantFiled: August 26, 2020Date of Patent: June 28, 2022Assignee: CANON KABUSHIKI KAISHAInventor: Takahiro Toyoshima
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Patent number: 11322534Abstract: The present disclosure relates to a solid-state imaging device and an electronic apparatus which allow reduction of optical crosstalk. In an example of FIG. 5B, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. In an example of FIG. 5C, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. The present disclosure can be applied to a CMOS solid-state imaging device used for an imaging apparatus such as a camera, for example.Type: GrantFiled: November 23, 2020Date of Patent: May 3, 2022Assignee: SONY CORPORATIONInventors: Masaaki Takizawa, Yasushi Tateshita, Takahiro Toyoshima, Takuya Toyofuku, Yorito Sakano, Motonobu Torii
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Publication number: 20210242256Abstract: The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.Type: ApplicationFiled: February 12, 2021Publication date: August 5, 2021Inventors: HIDEO KIDO, MASAHIRO TADA, TAKAHIRO TOYOSHIMA, YASUSHI TATESHITA, HIKARU IWATA
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Publication number: 20210143193Abstract: The present disclosure relates to a solid-state imaging device and an electronic apparatus which allow reduction of optical crosstalk. In an example of FIG. 5B, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. In an example of FIG. 5C, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. By placing the charge storage unit (capacitance element) formed in the substrate in the foregoing manner between PDs which are first photoelectric conversion units, it is possible to allow the capacitance element to function as a shield pair against crosstalk between the PDs in a unit pixel.Type: ApplicationFiled: November 23, 2020Publication date: May 13, 2021Inventors: MASAAKI TAKIZAWA, YASUSHI TATESHITA, TAKAHIRO TOYOSHIMA, TAKUYA TOYOFUKU, YORITO SAKANO, MOTONOBU TORII
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Patent number: 10998357Abstract: Provided is a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction.Type: GrantFiled: March 15, 2017Date of Patent: May 4, 2021Assignee: SONY CORPORATIONInventors: Hideo Kido, Masahiro Tada, Takahiro Toyoshima, Yasushi Tateshita, Hikaru Iwata
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Patent number: 10964735Abstract: Provided is a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction.Type: GrantFiled: March 15, 2017Date of Patent: March 30, 2021Assignee: SONY CORPORATIONInventors: Hideo Kido, Masahiro Tada, Takahiro Toyoshima, Yasushi Tateshita, Hikaru Iwata
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Publication number: 20210060832Abstract: An imprint apparatus that forms a pattern on a substrate by using a mold, the apparatus comprises a supply unit configured to supply an imprint material to the substrate; a contact unit configured to contact the imprint material that has been supplied to the substrate with a mold; a substrate stage configured to move the substrate; a gas supply unit that is provided between the supply unit and the contact unit, and supply gas toward the substrate; and a flow volume adjustment unit configured to adjust a flow volume of the gas that is supplied from the gas supply unit, while the substrate stage moves the substrate from a supply position at which the imprint material is supplied by the supply unit to a contact position at which the imprint material is contacted with the mold by the contact unit.Type: ApplicationFiled: November 12, 2020Publication date: March 4, 2021Inventor: Takahiro Toyoshima
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Publication number: 20210055650Abstract: To perform efficient releasing even if a force applied to the mold is reduced, provided is a mold which is used in an imprinting apparatus, for molding an imprinting material by imprinting the imprinting material on a substrate with an imprinting surface of the mold, and is released by applying a force in a releasing direction to a peeling region near an outer periphery of the mold, wherein a flexibility of the peeling region of the mold is higher than that of other portions near the outer periphery of the mold.Type: ApplicationFiled: August 26, 2020Publication date: February 25, 2021Inventor: Takahiro Toyoshima
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Patent number: 10875216Abstract: An imprint apparatus that forms a pattern on a substrate by using a mold, the apparatus comprises a supply unit configured to supply an imprint material to the substrate; a contact unit configured to contact the imprint material that has been supplied to the substrate with a mold; a substrate stage configured to move the substrate; a gas supply unit that is provided between the supply unit and the contact unit, and supply gas toward the substrate; and a flow volume adjustment unit configured to adjust a flow volume of the gas that is supplied from the gas supply unit, while the substrate stage moves the substrate from a supply position at which the imprint material is supplied by the supply unit to a contact position at which the imprint material is contacted with the mold by the contact unit.Type: GrantFiled: April 12, 2016Date of Patent: December 29, 2020Assignee: CANON KABUSHIKI KAISHAInventor: Takahiro Toyoshima
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Patent number: 10872919Abstract: Provided are a solid-state imaging device and an electronic apparatus that include a charge storage unit. The charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. The charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to the hole.Type: GrantFiled: January 13, 2017Date of Patent: December 22, 2020Assignee: SONY CORPORATIONInventors: Masaaki Takizawa, Yasushi Tateshita, Takahiro Toyoshima, Takuya Toyofuku, Yorito Sakano, Motonobu Torii
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Publication number: 20200365629Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: August 7, 2020Publication date: November 19, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
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Patent number: 10777597Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: GrantFiled: March 20, 2018Date of Patent: September 15, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Jun Ogi, Yoshiaki Tashiro, Takahiro Toyoshima, Yorito Sakano, Yusuke Oike, Hongbo Zhu, Keiichi Nakazawa, Yukari Takeya, Atsushi Okuyama, Yasufumi Miyoshi, Ryosuke Matsumoto, Atsushi Horiuchi
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Patent number: 10438983Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.Type: GrantFiled: March 17, 2016Date of Patent: October 8, 2019Assignee: Sony CorporationInventors: Keiji Tatani, Takuji Matsumoto, Yasushi Tateshita, Fumihiko Koga, Takashi Nagano, Takahiro Toyoshima, Tetsuji Yamaguchi, Keiichi Nakazawa, Naoyuki Miyashita, Yoshihiko Nagahama
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Publication number: 20190157323Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: March 20, 2018Publication date: May 23, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
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Publication number: 20190096933Abstract: The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.Type: ApplicationFiled: March 15, 2017Publication date: March 28, 2019Inventors: HIDEO KIDO, MASAHIRO TADA, TAKAHIRO TOYOSHIMA, YASUSHI TATESHITA, HIKARU IWATA