Patents by Inventor Takahiro UEHARA

Takahiro UEHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949405
    Abstract: A double mode SAW (DMS) filter includes: a plurality of interdigital transducers (IDTs), each having a plurality of Type 1 electrode fingers and a plurality of Type 2 electrode fingers formed on a piezoelectric substrate, wherein one Type 2 electrode finger among the plurality of Type 2 electrode fingers is disposed between two adjacent Type 1 electrode fingers among the plurality of Type 1 electrode fingers, and in a first IDT and a second IDT included in the plurality of IDTs to be adjacent to each other, one Type 1 electrode finger of the second IDT is disposed between two Type 1 electrode fingers of the first IDT. Accordingly, it is possible to provide a DMS filter capable of improving the amount of attenuation in an attenuation band adjacent to the wide band side for the passband and miniaturizing a product by saving space.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: April 2, 2024
    Assignee: WISOL CO., LTD.
    Inventors: Kensei Uehara, Takahiro Sato
  • Publication number: 20210304472
    Abstract: A method of controlling a display device configured to display an image based on image information generated in accordance with a position of a pointing body includes the steps of monitoring a load value related to a load on a system which is configured to generate the image information in accordance with the position of the pointing body, performing a first mode configured to generate first image object information on which an editing process is performed, in accordance with the position of the pointing body, and then generate the image information using the first image object information when the load value is lower than a threshold value, and performing a second mode configured to generate second image object information in a format lower in the load on the system than a format of the first image object information in accordance with the position of the pointing body, and then generate the image information using the second image object information when the load value is equal to or higher than the thresho
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Inventors: Kyosuke ITAHANA, Takahiro UEHARA
  • Patent number: 10848145
    Abstract: A driver circuit which is supplied with a positive power supply voltage, a negative power supply voltage, and an input signal, and drives a switching element including a control terminal according to the input signal includes: a first output terminal connected to the control terminal via a first impedance circuit, and outputs the positive power supply voltage or the negative power supply voltage according to the input signal, to charge the control terminal and put the switching element into an ON state; a negative power supply terminal supplied with the negative power supply voltage; a negative voltage switch having a first end connected to the negative power supply terminal; a third output terminal connected to a second end of the negative voltage switch and to the control terminal via a second impedance circuit; and a first discharge switch disposed between the negative power supply terminal and the first output terminal.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: November 24, 2020
    Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
    Inventors: Takuya Ishii, Yoshihito Kawakami, Takahiro Uehara, Ginga Katase
  • Patent number: 10483966
    Abstract: A switching circuit includes: a drive power supply; a first transistor and a second transistor; a drive signal source; and a drive circuit. Each of the first transistor and the second transistor includes: a drain electrode and a source electrode in which a main current flows when a corresponding one of the first transistor and the second transistor is ON; a first source terminal for passing the main current; and a second source terminal. Here, the first source terminal is connected to the source electrode at an impedance lower than an impedance of the second source terminal.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: November 19, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takahiro Uehara, Takuya Ishii, Hiroyuki Handa, Atsushi Kitagawa, Takeshi Tanaka
  • Publication number: 20190149148
    Abstract: A switching circuit includes: a drive power supply; a first transistor and a second transistor; a drive signal source; and a drive circuit. Each of the first transistor and the second transistor includes: a drain electrode and a source electrode in which a main current flows when a corresponding one of the first transistor and the second transistor is ON; a first source terminal for passing the main current; and a second source terminal. Here, the first source terminal is connected to the source electrode at an impedance lower than an impedance of the second source terminal.
    Type: Application
    Filed: December 19, 2018
    Publication date: May 16, 2019
    Inventors: Takahiro UEHARA, Takuya ISHII, Hiroyuki HANDA, Atsushi KITAGAWA, Takeshi TANAKA
  • Patent number: 10205449
    Abstract: A switching circuit includes: a drive power supply; a first transistor and a second transistor; a drive signal source; and a drive circuit. Each of the first transistor and the second transistor includes: a drain electrode and a source electrode in which a main current flows when a corresponding one of the first transistor and the second transistor is ON; a first source terminal for passing the main current; and a second source terminal. Here, the first source terminal is connected to the source electrode at an impedance lower than an impedance of the second source terminal.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: February 12, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takahiro Uehara, Takuya Ishii, Hiroyuki Handa, Atsushi Kitagawa, Takeshi Tanaka
  • Publication number: 20180212509
    Abstract: A switching circuit includes: a drive power supply; a first transistor and a second transistor; a drive signal source; and a drive circuit. Each of the first transistor and the second transistor includes: a drain electrode and a source electrode in which a main current flows when a corresponding one of the first transistor and the second transistor is ON; a first source terminal for passing the main current; and a second source terminal. Here, the first source terminal is connected to the source electrode at an impedance lower than an impedance of the second source terminal.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventors: Takahiro UEHARA, Takuya ISHII, Hiroyuki HANDA, Atsushi KITAGAWA, Takeshi TANAKA
  • Publication number: 20180083610
    Abstract: A driver circuit which is supplied with a positive power supply voltage, a negative power supply voltage, and an input signal, and drives a switching element including a control terminal according to the input signal includes: a first output terminal connected to the control terminal via a first impedance circuit, and outputs the positive power supply voltage or the negative power supply voltage according to the input signal, to charge the control terminal and put the switching element into an ON state; a negative power supply terminal supplied with the negative power supply voltage; a negative voltage switch having a first end connected to the negative power supply terminal; a third output terminal connected to a second end of the negative voltage switch and to the control terminal via a second impedance circuit; and a first discharge switch disposed between the negative power supply terminal and the first output terminal.
    Type: Application
    Filed: November 1, 2017
    Publication date: March 22, 2018
    Inventors: Takuya ISHII, Yoshihito KAWAKAMI, Takahiro UEHARA, Ginga KATASE
  • Patent number: 9354648
    Abstract: A constant-voltage circuit having an overcurrent protection circuit which includes: a first sense transistor, one main terminal connected to an input terminal of the constant-voltage circuit and a control terminal connected to a control terminal of an output transistor generates a current corresponding to an output current from the output transistor; a voltage level adjusting circuit configured to generate a voltage corresponding to a voltage of a main terminal of the output transistor at an output terminal side of the constant-voltage circuit by extracting a current that is not affected by a change in the output current from the output transistor, and adjust a voltage of another main terminal of the first sense transistor such that the adjusted voltage becomes equal to the generated voltage; and a protection circuit to control a control voltage applied from an error amplifier to the control terminal of the output transistor.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: May 31, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroshi Yajima, Hideyuki Kihara, Takahiro Uehara
  • Publication number: 20140184182
    Abstract: A constant-voltage circuit having an overcurrent protection circuit which includes: a first sense transistor, one main terminal connected to an input terminal of the constant-voltage circuit and a control terminal connected to a control terminal of an output transistor generates a current corresponding to an output current from the output transistor; a voltage level adjusting circuit configured to generate a voltage corresponding to a voltage of a main terminal of the output transistor at an output terminal side of the constant-voltage circuit by extracting a current that is not affected by a change in the output current from the output transistor, and adjust a voltage of another main terminal of the first sense transistor such that the adjusted voltage becomes equal to the generated voltage; and a protection circuit to control a control voltage applied from an error amplifier to the control terminal of the output transistor.
    Type: Application
    Filed: March 4, 2014
    Publication date: July 3, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroshi YAJIMA, Hideyuki KIHARA, Takahiro UEHARA
  • Publication number: 20140184184
    Abstract: A voltage detecting circuit including: a first current source including a first terminal connected to a first voltage input terminal; a second current source including a first terminal connected to ground potential VSS; and a first transistor including a first main terminal connected to a second terminal of the first current source, a second main terminal connected to a second terminal of the second current source and a detection output terminal, and a control terminal connected to a second voltage terminal. The first and the second current sources are configured such that a logic level of a detection output signal is determined based on whether one voltage applied to the first voltage terminal is higher or lower than a voltage obtained by adding a voltage of a difference between the first main terminal and control terminal of the first transistor to the other voltage applied to the second voltage terminal.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 3, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroshi YAJIMA, Hideyuki KIHARA, Takahiro UEHARA