Patents by Inventor Takahisa Uehira

Takahisa Uehira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9196221
    Abstract: A display device includes L number of display panels where L is a positive integer greater than 1; a driving circuit having L number of controllers for driving the respective display panels; and a central control unit configured to control the driving circuit. The controllers are configured to be synchronized with one another based on a clock signal from the central control unit, and each of the controllers is configured to sequentially and continuously select each one of K number of lines (where K is a positive integer greater than 1) arranged in a row in the corresponding display panel, and allow the selected line to emit light. Further, a direction for sequentially and continuously selecting each one of the lines is set to be the same in all the display panels.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: November 24, 2015
    Assignee: FUTABA CORPORATION
    Inventors: Masaru Yokoyama, Takahisa Uehira, Terukazu Sugimoto
  • Patent number: 6772078
    Abstract: A length measuring apparatus is provided that combines upper data with lower data and then outputs the composite data. The apparatus monitors taking down or up a digit of upper data or lower data and synchronization of lower data, thus preventing an occurrence of reading error. When an A/D area showing an area of lower data matches with an upper area quadrant showing an area of upper data (R2, R3), the upper count value outputting the upper data is output without any change. When the quadrant (0, 1, 2, 3) of the A/D area does not match with the quadrant (0, 1, 2, 3) of upper area because of an erroneous timing of a digit-taking-up of upper data (R1, R4), +1 or −1 is added to the upper count value. Thus, the continuity of a measured value can be obtained when the scale is being moved.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: August 3, 2004
    Assignee: Futaba Corporation
    Inventor: Takahisa Uehira
  • Patent number: 6580066
    Abstract: A measurement signal generating circuit for a linear scale capable of increasing an Signal-to-Noise (S/N) ratio, wherein S stands for Corona signal strength, and N for noise strength ratio of a signal for measurement of a linear scale. A photo detector or a low-pass filter for removing noise entering the measurement signal generating circuit is arranged rearwardly of each of an A phase signal generating circuit and a B phase signal generating circuit. Such construction permits a noise component at a different phase as well as that at the same phase to be effectively removed during synthesis of the measurement signal, to thereby reduce an error in measuring by the linear scale.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: June 17, 2003
    Assignee: Futaba Corporation
    Inventors: Takahisa Uehira, Toshihiko Kuga
  • Publication number: 20030069707
    Abstract: A length measuring apparatus is provided that combines upper data with lower data and then outputs the composite data. The apparatus monitors taking down or up a digit of upper data or lower data and synchronization of lower data, thus preventing an occurrence of reading error. When an A/D area showing an area of lower data matches with an upper area quadrant showing an area of upper data (R2, R3), the upper count value outputting the upper data is output without any change. When the quadrant (0, 1, 2, 3) of the A/D area does not match with the quadrant (0, 1, 2, 3) of upper area because of an erroneous timing of a digit-taking-up of upper data (R1, R4), +1 or −1 is added to the upper count value. Thus, the continuity of a measured value can be obtained when the scale is being moved.
    Type: Application
    Filed: October 9, 2002
    Publication date: April 10, 2003
    Applicant: Futaba Corporation
    Inventor: Takahisa Uehira
  • Publication number: 20020030497
    Abstract: A measurement signal generating circuit for a linear scale capable of increasing an S/N ratio of a signal for measurement of a linear scale. A photo detector or a low-pass filter for removing noise entering the measurement signal generating circuit is arranged rearwardly of each of an A phase signal generating circuit and a B phase signal generating circuit. Such construction permits a noise component at a different phase as well as that at the same phase to be effectively removed during synthesis of the measurement signal, to thereby reduce an error in measuring by the linear scale.
    Type: Application
    Filed: August 27, 2001
    Publication date: March 14, 2002
    Applicant: Futaba Denshi Kogyo K.K.
    Inventors: Takahisa Uehira, Toshihiko Kuga
  • Patent number: 6285023
    Abstract: In a linear scale, a reference point signal is outputted as a signal which is synchronized with an absolute value. 8 is a a/b phase signal generator forming a two-phase a/b signal of a moving signal by an absolute value which divided the inside of pitch when the a scale moves, 31 is a period counter, 32 is a subtracter, 33 is an up-down counter.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: September 4, 2001
    Assignee: Futaba Denshi Kogyo Kabushiki Kaisha
    Inventor: Takahisa Uehira