Patents by Inventor Takamitsu Fujimoto

Takamitsu Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10216050
    Abstract: In one embodiment, an array substrate includes an active area in the shape of a rectangle, and first, second third and fourth end portions, surrounding the active area. A source control circuit is electrically connected with one end of the source lines drawn to the third end portion from the active area. First and second common terminals of a common potential are formed in the first end portion. A power supply line is electrically connected with the first common terminal and extends along the second, third and fourth end portions in this order, and connected with the second common terminal. A branch wiring is electrically connected with an intermediate portion of the electric power supply line and the source control circuit, and extending in the first direction.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: February 26, 2019
    Assignee: Japan Display Inc.
    Inventor: Takamitsu Fujimoto
  • Patent number: 9548322
    Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 17, 2017
    Assignee: Japan Display Inc.
    Inventors: Takamitsu Fujimoto, Tetsuya Iizuka
  • Publication number: 20160124257
    Abstract: In one embodiment, an array substrate includes an active area in the shape of a rectangle, and first, second third and fourth end portions, surrounding the active area. A source control circuit is electrically connected with one end of the source lines drawn to the third end portion from the active area. First and second common terminals of a common potential are formed in the first end portion. A power supply line is electrically connected with the first common terminal and extends along the second, third and fourth end portions in this order, and connected with the second common terminal. A branch wiring is electrically connected with an intermediate portion of the electric power supply line and the source control circuit, and extending in the first direction.
    Type: Application
    Filed: January 12, 2016
    Publication date: May 5, 2016
    Applicant: JAPAN DISPLAY INC.
    Inventor: Takamitsu FUJIMOTO
  • Patent number: 9274363
    Abstract: In one embodiment, an array substrate includes an active area in the shape of a rectangle, and first, second third and fourth end portions, surrounding the active area. A source control circuit is electrically connected with one end of the source lines drawn to the third end portion from the active area. First and second common terminals of a common potential are formed in the first end portion. A power supply line is electrically connected with the first common terminal and extends along the second, third and fourth end portions in this order, and connected with the second common terminal. A branch wiring is electrically connected with an intermediate portion of the electric power supply line and the source control circuit, and extending in the first direction.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: March 1, 2016
    Assignee: Japan Display Inc.
    Inventor: Takamitsu Fujimoto
  • Publication number: 20150162352
    Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 11, 2015
    Applicant: Japan Display Inc.
    Inventors: Takamitsu Fujimoto, Tetsuya Iizuka
  • Publication number: 20130258221
    Abstract: In one embodiment, an array substrate includes an active area in the shape of a rectangle, and first, second third and fourth end portions, surrounding the active area. A source control circuit is electrically connected with one end of the source lines drawn to the third end portion from the active area. First and second common terminals of a common potential are formed in the first end portion. A power supply line is electrically connected with the first common terminal and extends along the second, third and fourth end portions in this order, and connected with the second common terminal. A branch wiring is electrically connected with an intermediate portion of the electric power supply line and the source control circuit, and extending in the first direction.
    Type: Application
    Filed: February 28, 2013
    Publication date: October 3, 2013
    Inventor: Takamitsu FUJIMOTO
  • Patent number: 8411240
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, scanning lines, signal lines, pixel switches, first electrodes, a scanning line drive circuit, a second electrode, a voltage supply wiring, a control mechanism, a first switching mechanism, a second switching mechanism, and an output timing switching mechanism. The output timing switching mechanism is configured to simultaneously output a second scanning signal of switching the pixel switch into conductive state to the scanning lines, based on the control signal.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: April 2, 2013
    Assignee: Japan Display Central Inc.
    Inventors: Kenji Harada, Takamitsu Fujimoto, Takahiro Oonuma
  • Patent number: 8373831
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, scanning lines, signal lines, pixel switches, first electrodes, a scanning line drive circuit, a second electrode, a voltage supply wiring, a control mechanism, a first switching mechanism, a second switching mechanism, and an output timing switching mechanism. The output timing switching mechanism is configured to simultaneously output a second scanning signal of switching the pixel switch into conductive state to the scanning lines, based on the control signal.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 12, 2013
    Assignee: Japan Display Central Inc.
    Inventors: Kenji Harada, Takamitsu Fujimoto, Takahiro Oonuma
  • Publication number: 20120212472
    Abstract: According to one embodiment, a liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, scanning lines, signal lines, pixel switches, first electrodes, a scanning line drive circuit, a second electrode, a voltage supply wiring, a control mechanism, a first switching mechanism, a second switching mechanism, and an output timing switching mechanism. The output timing switching mechanism is configured to simultaneously output a second scanning signal of switching the pixel switch into conductive state to the scanning lines, based on the control signal.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 23, 2012
    Inventors: Kenji HARADA, Takamitsu Fujimoto, Takahiro Oonuma
  • Patent number: 7973900
    Abstract: An array substrate of a liquid crystal display device includes an insulating substrate, a gate line extending in a first direction on the insulating substrate, a first insulation film which is disposed to cover the gate line, pixel electrodes which are disposed on the first insulation film in respective pixels, a source line which is disposed on the first insulation film and extends between the pixel electrodes along a second direction, a second insulation film which is disposed to cover the pixel electrode and the source line, and a common electrode which is disposed on the second insulation film in a manner to face the pixel electrode of each of the pixels and to face the gate line, and includes a slit which is opposed to the pixel electrode.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: July 5, 2011
    Assignee: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Takamitsu Fujimoto, Shin Morita
  • Publication number: 20100007838
    Abstract: An array substrate of a liquid crystal display device includes an insulating substrate, a gate line extending in a first direction on the insulating substrate, a first insulation film which is disposed to cover the gate line, pixel electrodes which are disposed on the first insulation film in respective pixels, a source line which is disposed on the first insulation film and extends between the pixel electrodes along a second direction, a second insulation film which is disposed to cover the pixel electrode and the source line, and a common electrode which is disposed on the second insulation film in a manner to face the pixel electrode of each of the pixels and to face the gate line, and includes a slit which is opposed to the pixel electrode.
    Type: Application
    Filed: May 6, 2009
    Publication date: January 14, 2010
    Inventors: Takamitsu Fujimoto, Shin Morita
  • Publication number: 20090160748
    Abstract: A liquid crystal display device, which is configured such that a liquid crystal layer is held between a pair of substrates, includes a scanning line which extends in a row direction of pixels, a signal line which extends in a column direction of the pixels, a pixel electrode which is disposed in association with each of the pixels and includes a slit, a first common electrode which is opposed to the pixel electrode via an interlayer insulation film, and a second common electrode which extends in parallel to the slit and is disposed adjacent to the pixel electrode in the same layer as the pixel electrode.
    Type: Application
    Filed: December 15, 2008
    Publication date: June 25, 2009
    Inventors: Yohei KIMURA, Takamitsu FUJIMOTO, Junichi KOBAYASHI, Takaharu OGINO
  • Patent number: 6303259
    Abstract: A recording material having a recording layer with microcapsules therein on a support, and a recording method. The microcapsules constituting the recording layer each are composed of a core, a heat-responsive resin layer covering the core, and a shell enveloping the heat-responsive resin layer. The shell is made of a material sensitive to and curable with light having a predetermined wavelength, the core contains a developer (or a dye precursor), and the shell contains a dye precursor (or a developer).
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: October 16, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuki Kubo, Toshio Kobayashi, Suguru Nagae, Takamitsu Fujimoto, Keiki Yamada
  • Patent number: 5888684
    Abstract: An electrophotographic photosensitive member which comprises an aluminum substrate having an aluminum oxide film at its surface, and, formed sequentially on the substrate, an intermediate layer and a photosensitive layer which contains a photoconductive material, wherein the intermediate layer contains from 5 to 20 wt % of a photoconductive material and has a thickness of from 0.5 to 5 .mu.m, and the resistivity of a laminate of the aluminum oxide film and the intermediate layer is from 10.sup.9 to 3.times.10.sup.10 .OMEGA./3.14 cm.sup.2 when a DC voltage of 20 V is applied.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: March 30, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshio Kobayashi, Kazuki Kubo, Kazuko Wakita, Suguru Nagae, Takamitsu Fujimoto
  • Patent number: 5783344
    Abstract: An electrophotographic photosensitive member which comprises an aluminum substrate having an aluminum oxide film at its surface and a photosensitive layer formed on the substrate, which contains a photoconductive material, wherein the aluminum oxide film has a thickness of from 3 to 15 .mu.m, and a resistivity of from 10.sup.9 to 3.times.10.sup.10 .OMEGA./3.14 cm.sup.2 when a DC voltage of 20 V is applied, and an impedance of from 1 to 20 M.OMEGA. at 100 Hz.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: July 21, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshio Kobayashi, Kazuki Kubo, Suguru Nagae, Takamitsu Fujimoto
  • Patent number: 5686216
    Abstract: An object of the present invention is to provide a photosensitive member having an excellent durability. A sensitizing solution is prepared by adding a polyester resin (resin A) synthesized using an isophthalic acid, neopentyl glycol, phthalic anhydride and adipic acid, other polyester resins, an X-form metal free phthalocyanine as a phthalocyanine type photoconductive compound and a curing agent to a solvent, and is dip-coated on a polyamide layer on an aluminum plate and then dried and cured to give a photosensitive member.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: November 11, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuki Kubo, Takamitsu Fujimoto, Suguru Nagae, Toshio Kobayashi, Kazuko Wakita
  • Patent number: 5276414
    Abstract: The improved moistureproof structure for a module circuit is characterized in that a porous film conditioned to have an apparent relative dielectric constant of no more than 2.0 is coated over a stripline a high-frequency circuit, or a high-frequency device formed on a substrate, which porous film may in turn be provided with a resin coating material. The structure insures that the module circuit is moistureproof, thereby protecting it against corrosion to improve its operational reliability without affecting its electrical characteristics.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: January 4, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takamitsu Fujimoto, Satoshi Yanaura, Atsuko Noda, Takeji Fujiwara, Hiroyuki Sato, Fumiaki Baba
  • Patent number: 5097317
    Abstract: A resin-sealed semiconductor device includes a semiconductor element mounted on a die frame, bonding wires and external wires connected to the bonding wires. The semiconductor element, the bonding wires and portions of the external leads are coated with porous silica gel impregnated with a sealing resin.
    Type: Grant
    Filed: July 13, 1990
    Date of Patent: March 17, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takamitsu Fujimoto, Shuichi Kita, Atsuko Noda, Hiroshi Koezuka