Patents by Inventor Takanori Kawashima

Takanori Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11003816
    Abstract: A structure analysis device includes a memory and a processor configured to obtain model information, evaluate a size of a model in accordance with the model information, select, in accordance with the evaluated size, either a direct method or an iterative method as a first algorithm of a simultaneous linear equation of a structure analysis solver that uses a finite element method, and execute structure analysis of the model by using the first algorithm.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: May 11, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Takanori Negishi, Yasuhiro Kawashima, Kazuya Yamaura, Masao Fukushima, Tsuyoshi Tamaki, Toshio Arai, Toshiyasu Ohara
  • Patent number: 10978381
    Abstract: A semiconductor device includes: a first semiconductor element including a first signal electrode; a second semiconductor element, laminated on the first semiconductor element, including a second signal electrode; a sealing body; a first signal terminal connected to the first signal electrode; and a second signal terminal connected to the second signal electrode, wherein: the first signal terminal and the second signal terminal project from the sealing body and extend in a first direction; the first signal terminal and the second signal terminal are distanced from each other in a second direction; the first signal electrode and the second signal electrode are placed at different positions in the second direction; the first signal electrode is provided closer to the first signal terminal than to the second signal terminal; and the second signal electrode is provided closer to the second signal terminal than to the first signal terminal.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: April 13, 2021
    Assignee: Denso Corporation
    Inventor: Takanori Kawashima
  • Patent number: 10964630
    Abstract: A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: March 30, 2021
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Makoto Imai, Masaki Aoshima
  • Patent number: 10943877
    Abstract: A semiconductor device may include at least one semiconductor chip, an encapsulant encapsulating the at least one semiconductor chip, a first power terminal connected to the at least one semiconductor chip within the encapsulant, and a second power terminal electrically connected to the first power terminal via the at least one semiconductor chip within the encapsulant.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Patent number: 10903138
    Abstract: A semiconductor device includes a substrate constituted of an insulator, a first conductor film provided on a surface of the substrate; a semiconductor chip including a first electrode and a second electrode, the first electrode being connected to the first conductor film; and an external connection terminal including an inner end portion and an outer end portion. The inner end portion is located between the substrate and the semiconductor chip and is connected to the second electrode. The external connection terminal further includes an intermediate portion located between the inner end portion and the outer end portion and joined to the surface of the substrate. A distance between the intermediate portion of the external connection terminal and the substrate is greater than a distance between the inner end portion of the external connection terminal and the substrate.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: January 26, 2021
    Assignee: DENSO CORPORATION
    Inventors: Akinori Sakakibara, Takanori Kawashima
  • Patent number: 10886207
    Abstract: A semiconductor device may be provided with a first semiconductor element including a plurality of signal electrodes, a second semiconductor element including a plurality of signal electrodes, an encapsulant encapsulating the first semiconductor element and the second semiconductor element, and a plurality of signal terminals protruding from the encapsulant. The plurality of signal terminals may include a first signal terminal, a second signal terminal and a common signal terminal. The first signal terminal may be connected with one of the signal electrodes of the first semiconductor element within the encapsulant. The second signal terminal may be connected with one of the signal electrodes of the second semiconductor element within the encapsulant. The common signal terminal may be, within the encapsulant, connected with another one of the signal electrodes of the first semiconductor element and another one of the signal electrodes of the second semiconductor element.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: January 5, 2021
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Hitoshi Ozaki, Takuya Isomura
  • Publication number: 20200411653
    Abstract: A semiconductor device may include a semiconductor substrate, an upper electrode provided on an upper surface of the semiconductor substrate, a lower electrode provided on a lower surface of the semiconductor substrate, and a terminal connected to the upper electrode. The semiconductor substrate may include an active region in which switching elements are provided. The switching elements may be configured to pass a current between the upper electrode and the lower electrode. The active region may include a main region located under the terminal and an external region located outside the main region. The external region may include a low current region. A current density in the low current region may be lower than a current density in the main region in a case where the switching elements in the low current region and the main region are turned on.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 31, 2020
    Inventors: Masayuki KAMIYA, Takanori KAWASHIMA
  • Patent number: 10861713
    Abstract: A semiconductor device may include first and second conductor plates opposed to each other via first and second semiconductor chips, a first conductor spacer interposed between the first semiconductor chip and the second conductor plate, a second conductor spacer interposed between the second semiconductor chip and the second conductor plate, and an encapsulant provided between the first and second conductor plates. A lower surface of the second conductor plate may include a first joint area where the first conductor spacer is joined, a second joint area where the second conductor spacer is joined, an adhesion area to which the encapsulant adheres, and a separation area from which the encapsulant is separated. The adhesion area may surround the first joint area, the second joint area, and the separation area. The separation area may be located between the first and the second joint areas.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: December 8, 2020
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Publication number: 20200365490
    Abstract: A semiconductor device may include: an upper conductive plate, a middle conductive plate, and a lower conductive plate which are stacked on each other; a first semiconductor chip located between the upper and middle conductive plates and electrically connected to both the upper and middle; a second semiconductor chip located between the middle and lower conductive plates and electrically connected to both the middle and lower conductive plates; and an encapsulant encapsulating the first and second semiconductor chips and integrally holding the upper, middle and lower conductive plates. The middle conductive plate may include a main portion joined to the first and second semiconductor chips within the encapsulant and an exposed portion exposed outside on a surface of the encapsulant. A thickness of the exposed portion may be equal to or greater than a thickness of the main portion.
    Type: Application
    Filed: April 9, 2020
    Publication date: November 19, 2020
    Applicant: Toyota Jidosha Kabushiki Kaisha
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Tetsuya Akino, Yuya Osamura
  • Publication number: 20200365491
    Abstract: A semiconductor device may include: an upper conductive plate, a middle conductive plate, and a lower conductive plate that are stacked on each other; a first semiconductor chip located between the upper conductive plate and the middle conductive plate and electrically connected to both the upper conductive plate and the middle conductive plate; and a second semiconductor chip located between the middle conductive plate and the lower conductive plate and electrically connected to both the middle conductive plate and the lower conductive plate, wherein one of an area of the upper conductive plate and an are of the lower conductive plate may be smaller than an area of the middle conductive plate, and another of the area of the upper conductive plate and the area of the lower conductive plate may be larger than the area of the middle conductive plate.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 19, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takanori KAWASHIMA
  • Publication number: 20200365498
    Abstract: A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.
    Type: Application
    Filed: April 3, 2020
    Publication date: November 19, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Publication number: 20200312802
    Abstract: A semiconductor device disclosed herein may include: a semiconductor element including an electrode on a surface of the semiconductor element; and a terminal bonded to the electrode via a bonding material, wherein the electrode may include a protrusion portion that protrudes toward the terminal and is in contact with the bonding material.
    Type: Application
    Filed: March 6, 2020
    Publication date: October 1, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takanori KAWASHIMA
  • Publication number: 20200286866
    Abstract: A semiconductor module disclosed herein may include: a first semiconductor element; an encapsulant that encapsulates the first semiconductor element; and a first stacked substrate on which the first semiconductor element is disposed, wherein the first stacked substrate may include a first insulator substrate, a first inner conductive layer and a first outer conductive layer, the first inner conductive layer being disposed on one side relative to the first insulator substrate, and the first outer conductive layer being disposed on another side relative to the first insulator substrate; the first inner conductive layer may be electrically connected to the first semiconductor element inside the encapsulant; and a part of the first inner conductive layer may be located outside the encapsulant and be configured to enable an external member to be bonded to the part.
    Type: Application
    Filed: January 30, 2020
    Publication date: September 10, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takanori KAWASHIMA
  • Publication number: 20200266130
    Abstract: A semiconductor device disclosed herein may include: a semiconductor element including a signal pad; and a signal terminal including a flat surface opposed to the signal pad, the flat surface being bonded to the signal pad with a spacer interposed therebetween. The flat surface may be larger than the signal pad in at least one direction parallel to the flat surface.
    Type: Application
    Filed: January 17, 2020
    Publication date: August 20, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takanori KAWASHIMA
  • Patent number: 10699997
    Abstract: A semiconductor device includes: a first semiconductor element; a first conductor plate laminated on the first semiconductor element and connected to the first semiconductor element; a first power terminal connected to the first conductor plate, the first power terminal including a body portion extending in a first direction and a joining portion extending in a second direction different from the first direction, the joining portion being connected to the first conductor plate; and a sealing body configured to seal the first semiconductor element, the first conductor plate, the joining portion, and a part of the body portion, the sealing body having a first surface that is a surface from which the body portion projects and a second surface that is a surface placed on an opposite side of the sealing body from the first surface.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 30, 2020
    Assignee: Denso Corporation
    Inventor: Takanori Kawashima
  • Publication number: 20200203253
    Abstract: A semiconductor device includes a substrate constituted of an insulator, a first conductor film provided on a surface of the substrate; a semiconductor chip including a first electrode and a second electrode, the first electrode being connected to the first conductor film; and an external connection terminal including an inner end portion and an outer end portion. The inner end portion is located between the substrate and the semiconductor chip and is connected to the second electrode. The external connection terminal further includes an intermediate portion located between the inner end portion and the outer end portion and joined to the surface of the substrate. A distance between the intermediate portion of the external connection terminal and the substrate is greater than a distance between the inner end portion of the external connection terminal and the substrate.
    Type: Application
    Filed: November 25, 2019
    Publication date: June 25, 2020
    Applicant: DENSO CORPORATION
    Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA
  • Publication number: 20200203252
    Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.
    Type: Application
    Filed: November 25, 2019
    Publication date: June 25, 2020
    Applicant: DENSO CORPORATION
    Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Takuya KADOGUCHI, Kohji URAMOTO, Yasuhiro OGAWA
  • Patent number: 10658261
    Abstract: A semiconductor device includes a first semiconductor element having an upper electrode and a lower electrode, a first upper heat sink connected to the upper electrode, and a first lower heat sink connected to the lower electrode. The first lower heat sink is opposed to the first upper heat sink such that the first semiconductor element is sandwiched between the upper and lower heat sinks. One of the first upper heat sink and the first lower heat sink is a laminated substrate having an insulator substrate (such as a ceramic substrate) and conductor layers disposed on opposite surfaces of the insulator substrate, and the other of the first upper heat sink and the first lower heat sink is a conductor plate that is a conductor having higher thermal conductivity than the insulator substrate.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: May 19, 2020
    Assignee: Denso Corporation
    Inventor: Takanori Kawashima
  • Publication number: 20200098673
    Abstract: A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board.
    Type: Application
    Filed: July 31, 2019
    Publication date: March 26, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takanori KAWASHIMA, Makoto IMAI, Masaki AOSHIMA
  • Publication number: 20200066546
    Abstract: A semiconductor device may include first and second conductor plates opposed to each other via first and second semiconductor chips, a first conductor spacer interposed between the first semiconductor chip and the second conductor plate, a second conductor spacer interposed between the second semiconductor chip and the second conductor plate, and an encapsulant provided between the first and second conductor plates. A lower surface of the second conductor plate may include a first joint area where the first conductor spacer is joined, a second joint area where the second conductor spacer is joined, an adhesion area to which the encapsulant adheres, and a separation area from which the encapsulant is separated. The adhesion area may surround the first joint area, the second joint area, and the separation area. The separation area may be located between the first and the second joint areas.
    Type: Application
    Filed: July 22, 2019
    Publication date: February 27, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Takanori KAWASHIMA