Patents by Inventor Takanori Kawashima

Takanori Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220392834
    Abstract: A semiconductor device includes a semiconductor element having a surface on which a first electrode and a second electrode are disposed, a conductor plate having a surface facing the surface of the semiconductor element and electrically connected to the first electrode, an insulating layer disposed on the surface of the conductor plate and covers a part of the surface of the conductor plate, and a conductor circuit pattern disposed on the insulating layer. The conductor circuit pattern has at least one conductor line electrically connected to the semiconductor element. The at least one conductor line includes a conductor line electrically connected to the second electrode.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 8, 2022
    Inventors: TAKUYA KADOGUCHI, TAKANORI KAWASHIMA, SHINJI HIRAMITSU, SHOICHIRO OMAE
  • Patent number: 11450647
    Abstract: A semiconductor module disclosed herein may include: a first semiconductor element; an encapsulant that encapsulates the first semiconductor element; and a first stacked substrate on which the first semiconductor element is disposed, wherein the first stacked substrate may include a first insulator substrate, a first inner conductive layer and a first outer conductive layer, the first inner conductive layer being disposed on one side relative to the first insulator substrate, and the first outer conductive layer being disposed on another side relative to the first insulator substrate; the first inner conductive layer may be electrically connected to the first semiconductor element inside the encapsulant; and a part of the first inner conductive layer may be located outside the encapsulant and be configured to enable an external member to be bonded to the part.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: September 20, 2022
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Patent number: 11444047
    Abstract: A semiconductor device disclosed herein may include: a semiconductor element including an electrode on a surface of the semiconductor element; and a terminal bonded to the electrode via a bonding material, wherein the electrode may include a protrusion portion that protrudes toward the terminal and is in contact with the bonding material.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: September 13, 2022
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Publication number: 20220278006
    Abstract: A semiconductor device includes a first insulating circuit board, a semiconductor element on the first insulating circuit board, and an encapsulating body. The first insulating circuit board includes a first insulating substrate, and a first inner conductor layer, and a first outer conductor layer. The first inner conductor layer is electrically connected to a first electrode of the semiconductor element inside of the encapsulating body. The first outer conductor layer is exposed from a surface of the encapsulating body. The first inner conductor layer has a first thin-wall portion a thickness of which reduces toward an outer side, along an outer peripheral edge of the first inner conductor layer with a first width. The first outer conductor layer (i) does not have or (ii) has a second thin-wall portion along the outer peripheral edge of the first outer conductor layer with a second width.
    Type: Application
    Filed: May 17, 2022
    Publication date: September 1, 2022
    Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Shingo TSUCHIMOCHI, Shoichiro OMAE
  • Patent number: 11430717
    Abstract: A semiconductor device may include: an upper conductive plate, a middle conductive plate, and a lower conductive plate that are stacked on each other; a first semiconductor chip located between the upper conductive plate and the middle conductive plate and electrically connected to both the upper conductive plate and the middle conductive plate; and a second semiconductor chip located between the middle conductive plate and the lower conductive plate and electrically connected to both the middle conductive plate and the lower conductive plate, wherein one of an area of the upper conductive plate and an are of the lower conductive plate may be smaller than an area of the middle conductive plate, and another of the area of the upper conductive plate and the area of the lower conductive plate may be larger than the area of the middle conductive plate.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: August 30, 2022
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Publication number: 20220270948
    Abstract: The semiconductor device includes a semiconductor module and a cooler. The semiconductor module includes an insulator substrate, an inner conductor film disposed on a first surface of the insulator substrate, a semiconductor element connected to the inner conductor film, a sealing body sealing the inner conductor film and the semiconductor element, and an outer conductor film disposed on a second surface of the insulator substrate and exposed from a surface of the sealing body. The cooler is disposed adjacent to the outer conductor film via a thermal interface material having fluidity. The outer conductor film has a protruding portion or a recessed portion on a surface being in contact with the thermal interface material.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Inventors: Hiroshi UKEGAWA, Takanori KAWASHIMA, Akinori SAKAKIBARA
  • Patent number: 11274972
    Abstract: A semiconductor device includes a first semiconductor element, a first signal terminal group, and a second signal terminal group disposed at an interval from the first signal terminal group. The first semiconductor element includes a control signal electrode to which a control signal for the first semiconductor element is input, and a temperature signal electrode that outputs a signal corresponding to temperature of the first semiconductor element. The temperature signal electrode is connected with a temperature signal terminal included in the first signal terminal group, and the control signal electrode is connected with a first control signal terminal included in the second signal terminal group.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: March 15, 2022
    Assignee: Denso Corporation
    Inventors: Takanori Kawashima, Hitoshi Ozaki
  • Patent number: 11276627
    Abstract: A semiconductor device may include: an upper conductive plate, a middle conductive plate, and a lower conductive plate which are stacked on each other; a first semiconductor chip located between the upper and middle conductive plates and electrically connected to both the upper and middle; a second semiconductor chip located between the middle and lower conductive plates and electrically connected to both the middle and lower conductive plates; and an encapsulant encapsulating the first and second semiconductor chips and integrally holding the upper, middle and lower conductive plates. The middle conductive plate may include a main portion joined to the first and second semiconductor chips within the encapsulant and an exposed portion exposed outside on a surface of the encapsulant. A thickness of the exposed portion may be equal to or greater than a thickness of the main portion.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: March 15, 2022
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Tetsuya Akino, Yuya Osamura
  • Patent number: 11244880
    Abstract: A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: February 8, 2022
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Patent number: 11201099
    Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: December 14, 2021
    Assignee: DENSO CORPORATION
    Inventors: Akinori Sakakibara, Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Patent number: 11127826
    Abstract: A semiconductor device may include a semiconductor substrate, an upper electrode provided on an upper surface of the semiconductor substrate, a lower electrode provided on a lower surface of the semiconductor substrate, and a terminal connected to the upper electrode. The semiconductor substrate may include an active region in which switching elements are provided. The switching elements may be configured to pass a current between the upper electrode and the lower electrode. The active region may include a main region located under the terminal and an external region located outside the main region. The external region may include a low current region. A current density in the low current region may be lower than a current density in the main region in a case where the switching elements in the low current region and the main region are turned on.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: September 21, 2021
    Assignee: DENSO CORPORATION
    Inventors: Masayuki Kamiya, Takanori Kawashima
  • Patent number: 11107761
    Abstract: A semiconductor device may include a first conductive plate, a plurality of semiconductor chips disposed on the first conductive plate, and a first external connection terminal connected to the first conductive plate. The plurality of semiconductor chips may include first, second, and third semiconductor chips. The second semiconductor chip may be located between the first semiconductor chip and the third semiconductor chip. A portion of the first conductive plate where the first external connection terminal is connected may be closest to the second semiconductor chip among the first, second, and third semiconductor chips. The first conductive plate may be provided with an aperture located between the portion of the first conductive plate where the first external connection terminal is connected and a portion of the first conductive plate where the second semiconductor chip is connected.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: August 31, 2021
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Publication number: 20210170026
    Abstract: Provided are an anticancer agent, radiosensitizer, and food composition capable of enhancing the effects of radiation therapy. The present inventors discovered that tumors shrink significantly in comparison to an untreated group and the respective monotherapy groups when treatment by burdock fruit extract containing arctigenin and radiation therapy were used in combination on mice transplanted with human pancreatic cancer cells. The anticancer agent of the present invention is an anticancer agent containing arctigenin and/or arctiin as the active ingredient, to be used in combination with radiation therapy. The arctigenin and/or arctiin may be contained as burdock, burdock fruit, burdock sprout, or forsythia, or an extract extracted from these.
    Type: Application
    Filed: July 10, 2017
    Publication date: June 10, 2021
    Applicants: KRACIE PHARMA, LTD., NATIONAL CANCER CENTER, TOKYO UNIVERSITY OF SCIENCE FOUNDATION
    Inventors: Hiroyasu ESUMI, Katsuya TSUCHIHARA, Takanori KAWASHIMA
  • Patent number: 10978381
    Abstract: A semiconductor device includes: a first semiconductor element including a first signal electrode; a second semiconductor element, laminated on the first semiconductor element, including a second signal electrode; a sealing body; a first signal terminal connected to the first signal electrode; and a second signal terminal connected to the second signal electrode, wherein: the first signal terminal and the second signal terminal project from the sealing body and extend in a first direction; the first signal terminal and the second signal terminal are distanced from each other in a second direction; the first signal electrode and the second signal electrode are placed at different positions in the second direction; the first signal electrode is provided closer to the first signal terminal than to the second signal terminal; and the second signal electrode is provided closer to the second signal terminal than to the first signal terminal.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: April 13, 2021
    Assignee: Denso Corporation
    Inventor: Takanori Kawashima
  • Patent number: 10964630
    Abstract: A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: March 30, 2021
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Makoto Imai, Masaki Aoshima
  • Patent number: 10943877
    Abstract: A semiconductor device may include at least one semiconductor chip, an encapsulant encapsulating the at least one semiconductor chip, a first power terminal connected to the at least one semiconductor chip within the encapsulant, and a second power terminal electrically connected to the first power terminal via the at least one semiconductor chip within the encapsulant.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Patent number: 10903138
    Abstract: A semiconductor device includes a substrate constituted of an insulator, a first conductor film provided on a surface of the substrate; a semiconductor chip including a first electrode and a second electrode, the first electrode being connected to the first conductor film; and an external connection terminal including an inner end portion and an outer end portion. The inner end portion is located between the substrate and the semiconductor chip and is connected to the second electrode. The external connection terminal further includes an intermediate portion located between the inner end portion and the outer end portion and joined to the surface of the substrate. A distance between the intermediate portion of the external connection terminal and the substrate is greater than a distance between the inner end portion of the external connection terminal and the substrate.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: January 26, 2021
    Assignee: DENSO CORPORATION
    Inventors: Akinori Sakakibara, Takanori Kawashima
  • Patent number: 10886207
    Abstract: A semiconductor device may be provided with a first semiconductor element including a plurality of signal electrodes, a second semiconductor element including a plurality of signal electrodes, an encapsulant encapsulating the first semiconductor element and the second semiconductor element, and a plurality of signal terminals protruding from the encapsulant. The plurality of signal terminals may include a first signal terminal, a second signal terminal and a common signal terminal. The first signal terminal may be connected with one of the signal electrodes of the first semiconductor element within the encapsulant. The second signal terminal may be connected with one of the signal electrodes of the second semiconductor element within the encapsulant. The common signal terminal may be, within the encapsulant, connected with another one of the signal electrodes of the first semiconductor element and another one of the signal electrodes of the second semiconductor element.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: January 5, 2021
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Hitoshi Ozaki, Takuya Isomura
  • Publication number: 20200411653
    Abstract: A semiconductor device may include a semiconductor substrate, an upper electrode provided on an upper surface of the semiconductor substrate, a lower electrode provided on a lower surface of the semiconductor substrate, and a terminal connected to the upper electrode. The semiconductor substrate may include an active region in which switching elements are provided. The switching elements may be configured to pass a current between the upper electrode and the lower electrode. The active region may include a main region located under the terminal and an external region located outside the main region. The external region may include a low current region. A current density in the low current region may be lower than a current density in the main region in a case where the switching elements in the low current region and the main region are turned on.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 31, 2020
    Inventors: Masayuki KAMIYA, Takanori KAWASHIMA
  • Patent number: 10861713
    Abstract: A semiconductor device may include first and second conductor plates opposed to each other via first and second semiconductor chips, a first conductor spacer interposed between the first semiconductor chip and the second conductor plate, a second conductor spacer interposed between the second semiconductor chip and the second conductor plate, and an encapsulant provided between the first and second conductor plates. A lower surface of the second conductor plate may include a first joint area where the first conductor spacer is joined, a second joint area where the second conductor spacer is joined, an adhesion area to which the encapsulant adheres, and a separation area from which the encapsulant is separated. The adhesion area may surround the first joint area, the second joint area, and the separation area. The separation area may be located between the first and the second joint areas.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: December 8, 2020
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima