Patents by Inventor Takao KACHI
Takao KACHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10811511Abstract: It is an object of the present invention to easily perform an electric characteristic test for ensuring quality of a semiconductor device on an electrode pattern defect or deficiency. A method of manufacturing a semiconductor device according to the present invention performs, a first etching having a higher selected ratio with respect to a semiconductor material of a first semiconductor layer than a material of a first electrode film over the first electrode film, and removes a region in the first semiconductor layer below a pattern defective part or a deficiency part of the first electrode film at least partially to form an electrode film in the pattern defective part or the deficiency part of the first electrode film.Type: GrantFiled: August 25, 2016Date of Patent: October 20, 2020Assignee: Mitsubishi Electric CorporationInventors: Takao Kachi, Yasuhiro Yoshiura
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Publication number: 20190319109Abstract: It is an object of the present invention to easily perform an electric characteristic test for ensuring quality of a semiconductor device on an electrode pattern defect or deficiency. A method of manufacturing a semiconductor device according to the present invention performs, a first etching having a higher selected ratio with respect to a semiconductor material of a first semiconductor layer than a material of a first electrode film over the first electrode film, and removes a region in the first semiconductor layer below a pattern defective part or a deficiency part of the first electrode film at least partially to form an electrode film in the pattern defective part or the deficiency part of the first electrode film.Type: ApplicationFiled: August 25, 2016Publication date: October 17, 2019Applicant: Mitsubishi Electric CorporationInventors: Takao KACHI, Yasuhiro YOSHIURA
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Patent number: 10340133Abstract: A silicon oxide film having at least one opening portion is formed, on a silicon substrate. A structural member formed of a material less prone to be etched by hydrofluoric acid than a silicon oxide film is formed, wherein the structural member is provided on the silicon oxide film and reaches the silicon substrate in the opening portion. Wet etching using hydrofluoric acid is performed, on the silicon substrate on which the silicon oxide film and the structural member are provided. The interface between the silicon oxide film and the structural member is exposed to hydrofluoric acid, in performing the wet etching.Type: GrantFiled: July 15, 2015Date of Patent: July 2, 2019Assignee: Mitsubishi Electric CorporationInventors: Takao Kachi, Yasuhiro Yoshiura
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Publication number: 20180190508Abstract: A silicon oxide film having at least one opening portion is formed, on a silicon substrate. A structural member formed of a material less prone to be etched by hydrofluoric acid than a silicon oxide film is formed, wherein the structural member is provided on the silicon oxide film and reaches the silicon substrate in the opening portion. Wet etching using hydrofluoric acid is performed, on the silicon substrate on which the silicon oxide film and the structural member are provided. The interface between the silicon oxide film and the structural member is exposed to hydrofluoric acid, in performing the wet etching.Type: ApplicationFiled: July 15, 2015Publication date: July 5, 2018Applicant: Mitsubishi Electric CorporationInventors: Takao KACHI, Yasuhiro YOSHIURA
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Patent number: 9755037Abstract: According to a first aspect of the present invention, a method of manufacturing semiconductor device includes the step of preparing a silicon substrate. The silicon substrate includes an N-type silicon layer on one surface and at least one of a PN junction, an electrode film, and a protective film on another surface. The method includes the steps of forming a Si—Ti junction by forming a first electrode film made of titanium on the N-type silicon layer; forming a second electrode film made of Al—Si on the first electrode film; forming a third electrode film made of Ni on the second electrode film; and heating the silicon substrate after forming the third electrode film. A titanium silicide layer is not formed between the N-type silicon layer and the first electrode film.Type: GrantFiled: December 30, 2014Date of Patent: September 5, 2017Assignee: Mitsubishi Electric CorporationInventors: Takao Kachi, Masayoshi Tarutani, Yasuhiro Yoshiura
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Patent number: 9455148Abstract: An insulating film (2) is formed on a main surface of a semiconductor substrate (1) that includes an active region and a termination region. The insulating film (2) in the active region is etched to form an opening (3). The insulating film (2) is used as a mask and an impurity is implanted into the semiconductor substrate (1) in a direction tilted by 20° or more from a direction normal to the main surface of the semiconductor substrate (1) while rotating the semiconductor substrate (1) to form a diffusion layer (7) in the active region. The diffusion layer (7) extends wider than the opening (3) up to below the insulating film (2) on the termination region side.Type: GrantFiled: December 7, 2012Date of Patent: September 27, 2016Assignee: Mitsubishi Electric CorporationInventors: Fumihito Masuoka, Katsumi Nakamura, Takao Kachi
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Publication number: 20150294871Abstract: According to a first aspect of the present invention, a method of manufacturing semiconductor device includes the step of preparing a silicon substrate. The silicon substrate includes an N-type silicon layer on one surface and at least one of a PN junction, an electrode film, and a protective film on another surface. The method includes the steps of forming a Si—Ti junction by forming a first electrode film made of titanium on the N-type silicon layer; forming a second electrode film made of Al—Si on the first electrode film; forming a third electrode film made of Ni on the second electrode film; and heating the silicon substrate after forming the third electrode film. A titanium silicide layer is not formed between the N-type silicon layer and the first electrode film.Type: ApplicationFiled: December 30, 2014Publication date: October 15, 2015Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Takao KACHI, Masayoshi TARUTANI, Yasuhiro YOSHIURA
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Publication number: 20150255290Abstract: An insulating film (2) is formed on a main surface of a semiconductor substrate (1) that includes an active region and a termination region. The insulating film (2) in the active region is etched to form an opening (3). The insulating film (2) is used as a mask and an impurity is implanted into the semiconductor substrate (1) in a direction tilted by 20° or more from a direction normal to the main surface of the semiconductor substrate (1) while rotating the semiconductor substrate (1) to form a diffusion layer (7) in the active region. The diffusion layer (7) extends wider than the opening (3) up to below the insulating film (2) on the termination region side.Type: ApplicationFiled: December 7, 2012Publication date: September 10, 2015Applicant: Mitsubishi Electric CorporationInventors: Fumihito Masuoka, Katsumi Nakamura, Takao Kachi
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Patent number: 8698250Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer above the N-type drift layer; an N-type cathode layer below the N-type drift layer; a first short lifetime layer between the N-type drift layer and the P-type anode layer; and a second short lifetime layer between the N-type drift layer and the N-type cathode layer. A carrier lifetime in the first and second short lifetime layers is shorter than a carrier lifetime in the N-type drift layer. A carrier lifetime in the N-type cathode layer is longer than the carrier lifetime in the N-type drift layer.Type: GrantFiled: June 18, 2012Date of Patent: April 15, 2014Assignee: Mitsubishi Electric CorporationInventors: Takao Kachi, Yasuhiro Yoshiura, Fumihito Masuoka
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Publication number: 20130093065Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer above the N-type drift layer; an N-type cathode layer below the N-type drift layer; a first short lifetime layer between the N-type drift layer and the P-type anode layer; and a second short lifetime layer between the N-type drift layer and the N-type cathode layer. A carrier lifetime in the first and second short lifetime layers is shorter than a carrier lifetime in the N-type drift layer. A carrier lifetime in the N-type cathode layer is longer than the carrier lifetime in the N-type drift layer.Type: ApplicationFiled: June 18, 2012Publication date: April 18, 2013Applicant: Mitsubishi Electric CorporationInventors: Takao KACHI, Yasuhiro YOSHIURA, Fumihito MASUOKA