Patents by Inventor Takao Nakamura

Takao Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8476615
    Abstract: A GaN-based semiconductor light emitting device 11a includes a substrate 13 composed of a GaN-based semiconductor having a primary surface 13a tilting from the c-plane toward the m-axis at a tilt angle ? of more than or equal to 63 degrees and less than 80 degrees, a GaN-based semiconductor epitaxial region 15, an active layer 17, an electron blocking layer 27, and a contact layer 29. The active layer 17 is composed of a GaN-based semiconductor containing indium. The substrate 13 has a dislocation density of 1×107 cm?2 or less. In the GaN-based semiconductor light emitting device 11a provided with the active layer containing indium, a decrease in quantum efficiency under high current injection can be moderated.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: July 2, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Katsushi Akita, Masaki Ueno, Takao Nakamura
  • Patent number: 8420426
    Abstract: To provide a light-emitting device using a nitride semiconductor which can attain high-power light emission by highly efficient light emission, a method of manufacturing the light-emitting device involves forming a first AlGaN layer of a first conductivity type on a side of a first main surface of a nitride semiconductor substrate, forming a light-emitting layer including an InAlGaN quaternary alloy on the first AlGaN layer, forming a second AlGaN layer of a second conductivity type on the light-emitting layer, and removing the nitride semiconductor substrate after forming the second AlGaN layer.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: April 16, 2013
    Assignees: Sumitomo Electric Industries, Ltd., RIKEN
    Inventors: Hideki Hirayama, Katsushi Akita, Takao Nakamura
  • Publication number: 20130043640
    Abstract: A conveying apparatus has a sheet conveying path, a first pair of rollers, which is positioned in the conveying path and which has a drive roller and a pinch roller and conveys the sheet, a second pair of rollers, which is positioned downstream relative to the first pair of rollers in the conveying direction and conveys the sheet conveyed by the first pair of rollers, and a mechanism which reduces the force for sandwiching the sheet by the drive roller and the pinch roller of the first pair of rollers or which moves both away from each other. After the sheet is conveyed by the first pair of rollers while the leading edge of the sheet is being stopped by the second pair of rollers, the second pair of rollers starts conveying the sheet, and the mechanism is actuated thereafter.
    Type: Application
    Filed: July 30, 2012
    Publication date: February 21, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Takao Nakamura
  • Patent number: 8362521
    Abstract: Group III nitride semiconductor crystals of a size appropriate for semiconductor devices and methods for manufacturing the same, Group III nitride semiconductor devices and methods for manufacturing the same, and light-emitting appliances. A method of manufacturing a Group III nitride semiconductor crystal includes a process of growing at least one Group III nitride semiconductor crystal substrate on a starting substrate, a process of growing at least one Group III nitride semiconductor crystal layer on the Group III nitride semiconductor crystal substrate, and a process of separating a Group III nitride semiconductor crystal, constituted by the Group III nitride semiconductor crystal substrate and the Group III nitride semiconductor crystal layer, from the starting substrate, and is characterized in that the Group III nitride semiconductor crystal is 10 ?m or more but 600 ?m or less in thickness, and is 0.2 mm or more but 50 mm or less in width.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: January 29, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Nakahata, Hideaki Nakahata, Koji Uematsu, Makoto Kiyama, Youichi Nagai, Takao Nakamura
  • Patent number: 8351440
    Abstract: An IP address and a MAC address of each of communication devices connected to a plurality of communication ports provided in a switching hub device are associated in an ARP table. Also, priority information representing the communication priority of each communication device is received, and the received priority information is associated with the MAC address of the communication device. When no IP address of a transmission source included in a data packet received at each communication port exists in the ARP table, the IP address and the MAC address of the transmission source are added to the ARP table and priority information is attached to the ARP table.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: January 8, 2013
    Assignee: Fujitsu Limited
    Inventors: Seigo Sawada, Takumi Iwai, Yoshinari Oshio, Takao Nakamura, Tsuneyuki Takai
  • Publication number: 20120299010
    Abstract: A III-nitride semiconductor device has a support base comprised of a III-nitride semiconductor and having a primary surface extending along a first reference plane perpendicular to a reference axis inclined at a predetermined angle with respect to a c-axis of the III-nitride semiconductor, and an epitaxial semiconductor region provided on the primary surface of the support base. The epitaxial semiconductor region includes GaN-based semiconductor layers. The reference axis is inclined at a first angle from the c-axis of the III-nitride semiconductor toward a first crystal axis, either the m-axis or a-axis. The reference axis is inclined at a second angle from the c-axis of the III-nitride semiconductor toward a second crystal axis, the other of the m-axis and a-axis. Morphology of an outermost surface of the epitaxial semiconductor region includes a plurality of pits. A pit density of the pits is not more than 5×104 cm?2.
    Type: Application
    Filed: May 31, 2012
    Publication date: November 29, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei ENYA, Yusuke Yoshizumi, Takashi Kyono, Takamichi Sumitomo, Katsushi Akita, Masaki Ueno, Takao Nakamura
  • Patent number: 8304269
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: November 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Takao Nakamura
  • Patent number: 8306082
    Abstract: A group-III nitride semiconductor laser device comprises a laser structure including a support base and a semiconductor region, and an electrode provided on the semiconductor region of the laser structure. The support base comprises a hexagonal group-III nitride semiconductor and has a semipolar primary surface, and the semiconductor region is provided on the semipolar primary surface of the support base. The semiconductor region includes a first cladding layer of a first conductivity type gallium nitride-based semiconductor, a second cladding layer of a second conductivity type gallium nitride-based semiconductor, and an active layer. The first cladding layer, the second cladding layer, and the active layer are arranged along a normal axis to the semipolar primary surface. The active layer comprises a gallium nitride-based semiconductor layer.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: November 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
  • Patent number: 8304793
    Abstract: A III-nitride semiconductor optical device has a support base comprised of a III-nitride semiconductor, an n-type gallium nitride based semiconductor layer, a p-type gallium nitride based semiconductor layer, and an active layer. The support base has a primary surface at an angle with respect to a reference plane perpendicular to a reference axis extending in a c-axis direction of the III-nitride semiconductor. The n-type gallium nitride based semiconductor layer is provided over the primary surface of the support base. The p-type gallium nitride based semiconductor layer is doped with magnesium and is provided over the primary surface of the support base. The active layer is provided between the n-type gallium nitride based semiconductor layer and the p-type gallium nitride based semiconductor layer over the primary surface of the support base. The angle is in the range of not less than 40° and not more than 140°. The primary surface demonstrates either one of semipolar nature and nonpolar nature.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: November 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takashi Kyono, Takao Nakamura
  • Publication number: 20120202304
    Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate with a semipolar primary surface, the semipolar primary surface including a hexagonal III-nitride semiconductor; forming a substrate product having a laser structure, an anode electrode, and a cathode electrode, the laser structure including a substrate and a semiconductor region, and the semiconductor region being formed on the semipolar primary surface; after forming the substrate product, forming first and second end faces; and forming first and second dielectric multilayer films for an optical cavity of the nitride semiconductor laser device on the first and second end faces, respectively.
    Type: Application
    Filed: March 9, 2012
    Publication date: August 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke YOSHIZUMI, Yohei ENYA, Takashi KYONO, Masahiro ADACHI, Shinji TOKUYAMA, Takamichi SUMITOMO, Masaki UENO, Takatoshi IKEGAMI, Koji KATAYAMA, Takao NAKAMURA
  • Patent number: 8227277
    Abstract: A method of fabricating a group-III nitride semiconductor laser device includes: preparing a substrate of a hexagonal group-III nitride semiconductor, where the substrate has a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, where the laser structure includes the substrate and a semiconductor region, and where the semiconductor region is formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal group-III nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
  • Publication number: 20120184057
    Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate with a semipolar primary surface, where the semipolar primary surface includes a hexagonal III-nitride semiconductor; forming a substrate product having a laser structure, an anode electrode, and a cathode electrode, where the laser structure includes a substrate and a semiconductor region, and the semiconductor region is formed on the semipolar primary surface; after forming the substrate product, forming first and second end faces; and forming first and second dielectric multilayer films for an optical cavity of the nitride semiconductor laser device on the first and second end faces, respectively.
    Type: Application
    Filed: February 6, 2012
    Publication date: July 19, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke YOSHIZUMI, Yohei ENYA, Takashi KYONO, Masahiro ADACHI, Shinji TOKUYAMA, Takamichi SUMITOMO, Masaki UENO, Takatoshi IKEGAMI, Koji KATAYAMA, Takao NAKAMURA
  • Patent number: 8207544
    Abstract: A III-nitride semiconductor device has a support base comprised of a III-nitride semiconductor and having a primary surface extending along a first reference plane perpendicular to a reference axis inclined at a predetermined angle ALPHA with respect to the c-axis of the III-nitride semiconductor, and an epitaxial semiconductor region provided on the primary surface of the support base. The epitaxial semiconductor region includes a plurality of GaN-based semiconductor layers. The reference axis is inclined at a first angle ALPHA1 in the range of not less than 10 degrees, and less than 80 degrees from the c-axis of the III-nitride semiconductor toward a first crystal axis, either one of the m-axis and a-axis. The reference axis is inclined at a second angle ALPHA2 in the range of not less than ?0.30 degrees and not more than +0.30 degrees from the c-axis of the III-nitride semiconductor toward a second crystal axis, the other of the m-axis and a-axis.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: June 26, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei Enya, Yusuke Yoshizumi, Takashi Kyono, Takamichi Sumitomo, Katsushi Akita, Masaki Ueno, Takao Nakamura
  • Patent number: 8208683
    Abstract: A digital watermark embedding apparatus for embedding embedding information, as digital watermark, into an input signal having dimensions equal to or greater than N (N is an integer equal to or greater than 2) and a digital watermark detection apparatus for detecting the digital watermark are disclosed. The digital watermark embedding apparatus generates an embedding sequence based on embedding information, generates a N?1-dimensional pattern based on the embedding sequence, generates N-dimensional embedding pattern by modulating a periodic signal according to a value on the N?1-dimensional pattern, and superimposing the embedding pattern in the input signal and outputs it.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: June 26, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Susumu Yamamoto, Takao Nakamura
  • Patent number: 8207556
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device includes a group III nitride semiconductor supporting base, a GaN based semiconductor region, an active layer, and a GaN semiconductor region. The primary surface of the group III nitride semiconductor supporting base is not any polar plane, and forms a finite angle with a reference plane that is orthogonal to a reference axis extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region, grown on the semipolar primary surface, includes a semiconductor layer of, for example, an n-type GaN based semiconductor doped with silicon. A GaN based semiconductor layer of an oxygen concentration of 5×1016 cm?3 or more provides an active layer, grown on the primary surface, with an excellent crystal quality.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 26, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Takao Nakamura
  • Publication number: 20120153292
    Abstract: In a liquid crystal display device that uses a top gate TFT, a contact hole is formed to connect to an image signal line. An inorganic passivation film and an organic passivation film are formed in this order so as to cover the TFT, on which a common electrode is formed. Then, an interlayer insulating film is formed on the common electrode. A through hole for gas release is formed in the interlayer insulating film. The diameter of the through hole is greater than the diameter of the contact hole, so as to be able to easily release gas from the organic passivation film, and to prevent the interlayer insulating film from peeling off.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 21, 2012
    Inventors: Takao NAKAMURA, Kazuki ISHII, Daisuke MUTOU, Hidenori SEKI
  • Publication number: 20120148325
    Abstract: This invention includes an input operation unit which accepts the operation of selecting a first or a second printing medium and outputs information indicating the selected printing medium, a conveyance path, a conveyance mechanism which conveys the selected printing medium in the conveyance direction, and a control unit. The conveyance mechanism includes a main roller, a driven roller which presses the main roller through the selected printing medium, a rotation member having a cam shape, and an elastic member which deforms to change a pressing force in accordance with the rotational position of the rotation member. The control unit rotates the rotation member to the first rotational position when the first printing medium is selected, and rotates the rotation member to the second rotational position where the pressing force becomes smaller than that at the first rotational position when the second printing medium is selected.
    Type: Application
    Filed: November 16, 2011
    Publication date: June 14, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Keisei Hakamata, Hiroyuki Saito, Takao Nakamura
  • Publication number: 20120142130
    Abstract: Provided is a group-III nitride semiconductor laser device with a laser cavity of high lasing yield, on a semipolar surface of a support base in which the c-axis of a hexagonal group-III nitride is tilted toward the m-axis. First and second fractured faces to form the laser cavity intersect with an m-n plane. The group-III nitride semiconductor laser device has a laser waveguide extending in a direction of an intersecting line between the m-n plane and the semipolar surface. In a laser structure, a first surface is opposite to a second surface. The first and second fractured faces extend from an edge of the first surface to an edge of the second surface. The fractured faces are not formed by dry etching and are different from conventionally-employed cleaved facets such as c-planes, m-planes, or a-planes.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 7, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke YOSHIZUMI, Shimpei TAKAGI, Yohei ENYA, Takashi KYONO, Masahiro ADACHI, Masaki UENO, Takamichi SUMITOMO, Shinji TOKUYAMA, Koji KATAYAMA, Takao NAKAMURA, Takatoshi IKEGAMI
  • Publication number: 20120128016
    Abstract: Provided is a III-nitride semiconductor laser diode which is capable of lasing at a low threshold. A support base has a semipolar or nonpolar primary surface. The c-axis Cx of a III-nitride is inclined relative to the primary surface. An n-type cladding region and a p-type cladding region are provided above the primary surface of the support base. A core semiconductor region is provided between the n-type cladding region and the p-type cladding region. The core semiconductor region includes a first optical guide layer, an active layer, and a second optical guide layer. The active layer is provided between the first optical guide layer and the second optical guide layer. The thickness of the core semiconductor region is not less than 0.5 ?m. This structure allows the confinement of light into the core semiconductor region without leakage of light into the support base, and therefore enables reduction in threshold current.
    Type: Application
    Filed: December 16, 2011
    Publication date: May 24, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masahiro ADACHI, Shinji TOKUYAMA, Yohei ENYA, Takashi KYONO, Yusuke YOSHIZUMI, Katsushi AKITA, Masaki UENO, Koji KATAYAMA, Takatoshi IKEGAMI, Takao NAKAMURA
  • Patent number: 8183071
    Abstract: In step S106, an InXGa1-XN well layer is grown on a semipolar main surface between times t4 and t5 while a temperature in a growth furnace is maintained at temperature TW. In step S107, immediately after completion of the growth of the well layer, the growth of a protective layer covering the main surface of the well layer is initiated at temperature TW. The protective layer is composed of a gallium nitride-based semiconductor with a band gap energy that is higher than that of the well layer and equal to or less than that of a barrier layer. In step S108, the temperature in the furnace is changed from temperatures TW to TB before the barrier layer growth. The barrier layer composed of the gallium nitride-based semiconductor is grown on the protective layer between times t8 and t9 while the temperature in the furnace is maintained at temperature TB.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: May 22, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura