Abstract: A server apparatus includes a storage medium configured to store print target data and information indicating whether the print target data has been printed and a processor configured to determine, based on the stored information, whether there is print target data that has not been printed by a printing apparatus and transmit the print target data to the printing apparatus, in a case that it is determined that there is the print target data that has not been printed by the printing apparatus.

Abstract: A biosensor is a field-effect transistor-based biosensor including an insulating substrate, and a measurement sensor and a reference sensor on the insulating substrate. A probe molecule is in the measurement sensor. The probe molecule has a first basic moiety in the measurement sensor, and a recognition moiety with a first end bound to the first basic moiety and a second end defining a distal end of the probe molecule. A second basic moiety is in the reference sensor and has a same structure as that of the first basic moiety of the probe molecule in the measurement sensor. The recognition moiety of the probe molecule in the measurement sensor is absent at the distal end of the second basic moiety.

Abstract: A graphene transistor includes a graphene layer including at least one sheet of graphene, a drain electrode and a source electrode each electrically connected to the graphene layer, a charge donor on at least one main surface of the graphene layer, the charge donor including an impurity charge, and a counter ion having a charge with a sign different from a sign of the impurity charge.

Abstract: There is provided a method of detecting a microscopic body stored in a plurality of receptacles formed separately from each other. The method, which is provided as a technique for enclosing a to-be-detected substance such as nucleic acid, protein, virus, and cell by means of a simple operation in droplets of an extremely small volume and enabling highly sensitive detection, includes the steps of (1) introducing a solvent into a space between a lower layer part in which the receptacles are formed and an upper layer part facing a surface of the lower layer part in which surface the receptacles are formed, wherein the solvent contains the microscopic body; (2) introducing gas into the space to form a droplet of the solvent in the receptacles, wherein the droplet contains the microscopic body; and (3) detecting the microscopic body present in the droplet optically, electrically, and/or magnetically.

Abstract: A memory buffer mounted on a memory module includes a pre-launch function of advancing outputs of address/command signal and a post-launch function of delaying outputs of control signal. A time step increment for pre/post-launch time adjustment is set to be equal to or finer than tCK/32 where tCK is one clock cycle.

Abstract: The present invention is adapted to a memory system that includes: a motherboard and a module board, wherein: the motherboard comprises a module socket mounted on the motherboard; and a plurality of pins two-dimensionally arranged on the module socket, and vertically erected with respect to the motherboard: and the module board comprises a plurality of device chips installed on the module board; and a contact portion mounted on the module board, and including a plurality of through holes two-dimensionally arranged thereon, the contact portion being electrically connected to the device chips: wherein each of the pins is inserted into each of the through holes to connect electrically to the contact portion.

Abstract: A memory buffer mounted on a memory module includes a pre-launch function of advancing outputs of address/command signal and a post-launch function of delaying outputs of control signal. A time step increment for pre/post-launch time adjustment is set to be equal to or finer than tCK/32 where tCK is one clock cycle.

Abstract: To provide a module substrate, memory chips mounted on the module substrate, and data input/output wirings that are connected respectively to the memory chips and read data or write data is transmitted thereto. The number of memory chips is equal to the number of bits of read data or write data transmitted through the data input/output wirings at the same time. Because a plurality of data input/output wirings are connected to different memory chips, the load exerted upon each channel can be reduced without using memory buffers.

Abstract: In an electrical component including a solid-state circuit portion and a substrate connecting portion, the solid-state circuit portion includes: a supporting surface faced to and supported by the substrate connecting portion; and an opposing surface which is widened outside the supporting surface and which has an area enough to be opposed to another solid-state circuit portion. This structure makes it possible to arrange, on a circuit board, a plurality of the electrical components in a staggered manner in a height direction.

Abstract: Ground via provided in an end portion of a multi-layer printed circuit board so as to suppress a leakage of magnetic field from the end portion of the board causes a problem that a digital circuit of high density cannot be mounted on the board due to necessity of area for locating the ground via. Further, a case of using solder plating for the end portion of the board causes a problem that manufacturing process is added and that numbers of days and costs for manufacturing the multi-layer printed circuit board are increased. In a multi-layer printed circuit board has a plurality of ground layers and at least one signal layer, the signal layer in which a signal pattern is wired at an end portion of the multi-layer printed circuit board is sandwiched between upper adjacent and lower adjacent ground layers, and the upper adjacent and lower adjacent ground layers are connected to each other by recessed conductors at the end portion thereof.

Abstract: A semiconductor unit constituting a memory device has a memory chip, a package substrate having three wiring layers. Power-supply surfaces (VDD surface) and (GND surface) are wired on the package substrate while an intra-package DQ bus is wired on an intermediate layer between both of the power-supply surfaces. The memory device has two DQ pins every one intra-package DQ bus. The intra-package DQ bus is connected to a signal terminal pad of the memory chip through a via hole. In view of the two DW pins, a via hole for connecting the intra-package DQ bus with the signal terminal pad constitutes a branch wire.

Abstract: In an electrical component including a solid-state circuit portion and a substrate connecting portion, the solid-state circuit portion includes: a supporting surface faced to and supported by the substrate connecting portion; and an opposing surface which is widened outside the supporting surface and which has an area enough to be opposed to another solid-state circuit portion. This structure makes it possible to arrange, on a circuit board, a plurality of the electrical components in a staggered manner in a height direction.

Abstract: A semiconductor module includes a driver IC chip and a plurality of memory IC chips on a common wiring board. Some of the memory IC chips nearer to the driver IC chip than the other memory IC chips are mounted on an interposer substrate mounted on the wiring board, providing a uniform line length among a species of signal lines for the memory IC chips.

Abstract: The present invention provides a wireless device including: at least an antenna; and at least a conductive ground serving as a ground, through which a high frequency current flows, and the conductive ground having at least a side which is approximately one quarter wavelength of a radio wave transmitted from the antenna, the at least side of the conductive ground having a feeding point, at which the antenna is electrically connected to the conductive ground, wherein the feeding point on the side is positioned closer to one end of the side than a center position, so that the feeding point is positioned asymmetrical to the conductive ground in any directions included in a plane parallel to the conductive ground, whereby the high frequency current flowing, through the conductive ground has an asymmetrical distribution of current over the conductive ground.

Abstract: A package for mounting a semiconductor device has a surface exposed to an atmosphere. The exposed surface is covered with a covering material such as a paint, a tape or a seal.

Abstract: A thermal expansion coefficient of a module substrate 8 is different from that of a package substrate. There is not any place where stresses generated in Interfaces between soldering balls 5 and the substrate are released. These stresses are largely applied to soldering bond, the soldering balls are strained, deformed, or cracked, and there has been a problem in long-time reliability. Slits are disposed on opposite sides of each soldering ball in a vertical direction to a side in an outer peripheral side of the package substrate, accordingly the stresses applied to the soldering balls are weakened, and the soldering balls are prevented from being strained, deformed, or cracked. When soldering strains are reduced in this manner, there can be provided a surface mounting type semiconductor package and system module having high reliability, low cost, and satisfactory electric characteristics such as low capacitance and low inductance.

Abstract: The DC brushless motor is capable of increasing an output power and reducing vibrations and noise. The DC brushless motor comprises: a magnet rotor, in which magnetic poles are polar-anisotropically oriented, wherein the magnetic poles are skewed with respect to an axial line of the magnet rotor.

Abstract: The invention provides a memory system that allows connection of a memory controller to each of plural memory modules in an equal distance. The memory system includes a memory controller, three memory modules, a single socket which the three memory modules can be inserted into and pulled out from, and a mother board on which the memory controller and the socket are mounted, etc. And, the memory controller and each of the memory modules are connected in an equal distance through the socket pins of the socket that are branched from bus wirings on the mother board. The socket is furnished with three sets of the plural socket pins in a radial form, in correspondence with each of the memory modules. The socket has two types of structures: one has three module-board contacts for one board-bus connection, and the other has one module-board contact for one board-bus connection.

Abstract: There is provided an in-oil atomization method wherein a solder is fused and dispersed in a heated particle dispersion medium, the method being featured in that even if the quantity of the particle dispersion medium to be employed is relatively small, fine solder particles can be effectively obtained. Namely, this invention provides a method of manufacturing fine particles, wherein solder is fused in the heated particle dispersion medium to obtain a molten solder, which is then dispersed by means of an agitator to obtain molten solder particles which are subsequently cooled and solidify, the method being characterized in that the above dispersing step is performed in the presence of a particle coalescence-preventing agent. This invention also provides a fine metal particles-containing substance and a paste solder composition.

Abstract: A semiconductor unit constituting a memory device has a memory chip, a package substrate having three wiring layers. Power-supply surfaces (VDD surface) and (GND surface) are wired on the package substrate while an intra-package DQ bus is wired on an intermediate layer between both of the power-supply surfaces. The memory device has two DQ pins every one intra-package DQ bus. The intra-package DQ bus is connected to a signal terminal pad of the memory chip through a via hole. In view of the two DW pins, a via hole for connecting the intra-package DQ bus with the signal terminal pad constitutes a branch wire.