Patents by Inventor Takashi Higuchi

Takashi Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060042756
    Abstract: A semiconductor manufacturing apparatus for cleaning a semiconductor substrate comprises a high-temperature circulation type chemical bath which is filled with a chemical to be used for cleaning of a semiconductor substrate and in which the chemical is circulated and reused, a draining mechanism which drains the chemical in the chemical bath therefrom, an auxiliary fluid supplying mechanism which adds to the drained chemical regarded as a waste chemical an auxiliary fluid, and thereby heats the waste chemical, a heat exchanger in which the heated waste chemical is stored temporarily and a new chemical is allowed to flow, and which cools the waste chemical and raises temperature of the new chemical by heat exchange, and a pipe in which the new chemical having the temperature raised in the heat exchanger is supplied to the chemical bath.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 2, 2006
    Inventors: Kunihiro Miyazaki, Takashi Higuchi, Toshiki Nakajima
  • Publication number: 20050081886
    Abstract: There is disclosed a wafer cleaning method comprising supplying a cleaning water to a wafer cleaned with a chemical solution, measuring the resistivity of a solution including the chemical solution and cleaning water, and differentiating the measured value with respect to time, and cleaning the wafer continuously with the cleaning water until the time differential value of the resistivity becomes equal to or less than a preset value and is held at that values for preset time.
    Type: Application
    Filed: September 2, 2004
    Publication date: April 21, 2005
    Inventors: Kunihiro Miyazaki, Takashi Higuchi, Toshiki Nakajima, Hiroyuki Matsuo
  • Publication number: 20050039149
    Abstract: A microcomputer logic development device realizing high speed sampling RAM monitoring by connecting an existing RAM measurement device, provided with a first block providing functions corresponding to a microcomputer core, a second block having functions corresponding to microcomputer resources, a bus connecting the first and second blocks, and a RAM measurement block provided with a common memory, connected with the bus and RAM measurement device, and realizing a RAM monitor function with respect to the first block, the RAM measurement block realizing a high speed RAM monitoring operation by dividing the timing for processing between the first block and common memory and the timing for processing between the common memory and RAM measurement device.
    Type: Application
    Filed: July 2, 2004
    Publication date: February 17, 2005
    Applicant: Fujitsu Ten Limited
    Inventors: Shougo Imada, Kouichi Kanou, Takashi Higuchi
  • Publication number: 20040236873
    Abstract: An input processing circuit is interposed between input terminals and input ports of an MPU. An output processing circuit is interposed between output ports of the MPU and output terminals. The input processing circuit includes switch sections and processing sections. The output processing circuit includes switch sections and processing sections. A switch control section switches the switch sections based on switch information stored in a switch information storage section to switch a connection relationship between the input terminals and the input ports, processing for an input signal, a connection relationship between the output ports and the output terminals, and processing for an output signal.
    Type: Application
    Filed: January 26, 2004
    Publication date: November 25, 2004
    Applicant: FUJITSU TEN LIMITED
    Inventors: Tomohide Kasame, Yoshikazu Hashimoto, Yuichiro Shimizu, Nobunori Asayama, Akio Okahara, Kazuhiro Komatsu, Takashi Higuchi
  • Patent number: 6802223
    Abstract: The invention consists in a capacitative electromagnetic flow meter in which excitation is performed at a frequency above the commercially available frequency and having a characteristic correction filter that corrects the gain frequency characteristic of the exciting current such that the exciting flux waveform has a flat section. In the detection unit, the value of the electrostatic capacitance between the face electrodes 4A, 4B and guard electrodes 5A, 5B is made smaller than the value of the electrostatic capacitance between the detecting face electrodes 4A, 4B and the fluid to be measured. The exciting coils are fixed to a cylindrical yoke, being electrostatically screened by coil fixing plates. Fixing by an earth ring is performed with this cylindrical yoke and the two ends of the measurement tube being symmetrical with respect to the tube axis and electrode axes. In addition, fixing is effected by filling the entire interior of the detection unit with epoxy resin.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: October 12, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Nakatani, Tatsuya Kimura, Yoshito Sameda, Takuya Iijima, Takashi Higuchi, Makoto Futoo, Hiroaki Nojiri, Kiyonori Nishikawa, Toshihiko Okamoto
  • Publication number: 20040186938
    Abstract: Provided is a logic development system that can ensure the capability of a CPU required for preceding logic, guarantee reliable communication of input/output information, and improve the throughput of the CPU. A logic development system for a built-in microcomputer employed in an electronic control unit (ECU) comprises: a motherboard that accommodates an application facility and a communication facility; a core board that accommodates quasi microcomputer peripheral devices, a, computing facility, and a communication facility and that is connected to the motherboard over a PCI bus; and an interface board that includes circuits equivalent to the hardware of the ECU and that is connected to the core board. The communication facility on the motherboard and each of the quasi microcomputer peripheral devices on the core board transfer data directly to or from each other over the PCI bus linking them.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Inventors: Shougo Imada, Toshihiro Kashihara, Takashi Higuchi
  • Publication number: 20040123670
    Abstract: The invention consists in a capacitative electromagnetic flow meter in which excitation is performed at a frequency above the commercially available frequency and having a characteristic correction filter that corrects the gain frequency characteristic of the exciting current such that the exciting flux waveform has a flat section. In the detection unit, the value of the electrostatic capacitance between the face electrodes 4A, 4B and guard electrodes 5A, 5B is made smaller than the value of the electrostatic capacitance between the detecting face electrodes 4A, 4B and the fluid to be measured. The exciting coils are fixed to a cylindrical yoke, being electrostatically screened by coil fixing plates. Fixing by an earth ring is performed with this cylindrical yoke and the two ends of the measurement tube being symmetrical with respect to the tube axis and electrode axes. In addition, fixing is effected by filling the entire interior of the detection unit with epoxy resin.
    Type: Application
    Filed: September 25, 2003
    Publication date: July 1, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Nakatani, Tatsuya Kimura, Yoshito Sameda, Takuya Iijima, Takashi Higuchi, Makoto Futoo, Hiroaki Nojiri, Kiyonori Nishikawa, Toshihiko Okamoto
  • Publication number: 20040083234
    Abstract: The present invention relates to application production for realizing new logic on the basis of applications saved in a plurality of electronic control units (ECUs) mounted in a vehicle. The plurality of existing applications is saved as a base of an application to be produced. An identifier is appended to file names of a plurality of data items contained in the applications. Double reading of the same file shared by the applications is avoided. When a produced application is transferred to a mass-produced ECU, identifiers are left intact. When the produced application is transferred while being divided into a plurality of applications to be installed in a plurality of ECUs, identifiers appended to respective file names are deleted.
    Type: Application
    Filed: March 25, 2003
    Publication date: April 29, 2004
    Inventor: Takashi Higuchi
  • Patent number: 6636148
    Abstract: A periphery monitoring system of a first embodiment controlling the cruising of a mounted vehicle by judging which of a first region along a path of advance of the mounted vehicle, a second region near the outside of the first region, and a third region other than the first and second regions a target detected by a radar system is in; a periphery monitoring system of a second embodiment detecting an inspection plane based on an output of a television camera and radar system and judging a vehicle has cut in front when the time by which an inspection plane outside of the cruising lane reaches a boundary line is smaller than a certain threshold value; and a periphery monitoring system of a third embodiment detecting an inspection plane based on an output of a television camera and radar system and judging the range surrounded by inspection planes in which there is no target and the mounted vehicle can pass as an advance range.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Ten Limited
    Inventor: Takashi Higuchi
  • Patent number: 6492935
    Abstract: For data detected by a milltimetric wave radar 2 and an image sensor 3, a signal processor 4 of a peripheral monitoring sensor 1 divides an area in which a detected target exists into a plurality of areas. For a target that exists within a certain specific area, information on the target is prepared based on the information obtained by both sensors. The millimetric wave radar is good at measuring a range and a speed of a target at long range. The image sensor is good at measuring a width and a bearing of a target. Therefore, by combining the data that each sensor is good at obtaining, it is possible to obtain accurate information. The signal processor 4 decides a surface of a target by combining an existing position of the target detected by the millimetric wave radar with target information detected by the image sensor. Thus, a peripheral monitoring sensor is obtained that securely senses a range, a relative speed, and a shape of the target.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: December 10, 2002
    Assignee: Fujitsu Ten Limited
    Inventor: Takashi Higuchi
  • Publication number: 20020027503
    Abstract: A periphery monitoring system of a first embodiment controlling the cruising of a mounted vehicle by judging which of a first region along a path of advance of the mounted vehicle, a second region near the outside of the first region, and a third region other than the first and second regions a target detected by a radar system is in; a periphery monitoring system of a second embodiment detecting an inspection plane based on an output of a television camera and radar system and judging a vehicle has cut in front when the time by which an inspection plane outside of the cruising lane reaches a boundary line is smaller than a certain threshold value; and a periphery monitoring system of a third embodiment detecting an inspection plane based on an output of a television camera and radar system and judging the range surrounded by inspection planes in which there is no target and the mounted vehicle can pass as an advance range.
    Type: Application
    Filed: August 13, 2001
    Publication date: March 7, 2002
    Inventor: Takashi Higuchi
  • Patent number: 6130852
    Abstract: Registers are arranged along at least opposite two sides of the four sides of a dynamic random access memory cell array. The registers are interconnected via an internal data bus line used for internal data transfer for the memory cell array. At least one register of the registers arranged along the opposite two sides is coupled with an external data bus, and the other register is coupled with an internal circuit via an internal data bus. An external controller which controls an operation in response to an external control signal is provided for the register coupled with an external circuit. An internal controller which controls an operation according to a control signal from the internal circuit is provided for the register coupled with the internal circuit. The external and internal circuits are permitted to simultaneously access the memory cell array only when the external and internal circuits read the data of a memory cell located at the same address of the memory cell array.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: October 10, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Jun Ohtani, Akira Yamazaki, Naoto Okumura, Takashi Higuchi
  • Patent number: 6028805
    Abstract: Provided is a structure in which a refresh region to be actually refreshed can be set on an outside of a DRAM. A refresh control register (21) is provided to store a refresh control bit which is sent from the outside and indicates the region to be refreshed. A refresh address deciding circuit (22) is provided to compare a content (RCB) stored in the refresh control register (21) with a refresh address (RAi) output from a refresh address generating circuit (11). An internal timing control circuit (5A) stops operations of a row decoder (3) and a sense amplifier (4) according to a result of a decision made by the refresh address deciding circuit (22).
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: February 22, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takashi Higuchi
  • Patent number: 5990406
    Abstract: Correct musical performances are played back at edit points by inserting an event specifying a sound source at each of the edit points, by inserting edit-point denoting events each for denoting one of the edit points, and by inserting an edit-point control event for controlling the edit points during work to edit a standard MIDI file.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: November 23, 1999
    Assignee: Sony Corporation
    Inventors: Junichi Nakamura, Shuichi Ohtsu, Shigeru Aoyagi, Takashi Higuchi
  • Patent number: 5983367
    Abstract: A CPU can selectively execute a normal processing mode and a debugging mode on the basis of a control signal sent from a control unit. A first memory cell array is accessed in the normal processing mode, and a second memory cell array is accessed in the debugging mode. A sense amplifier and a bit line are shared by the first and second memory cell arrays. Consequently, it is possible to relieve an increase in the area of the semiconductor chip caused by existence of the two memory cell arrays. That is, an area of a semiconductor chip is reduced. A spare memory cell array may be provided for compensating for a defective cell of the first memory cell array. A refresh circuit may be provided for refreshing the first and second memory cell arrays.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: November 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takashi Higuchi, Naoto Okumura, Hideo Tsubota
  • Patent number: 5487310
    Abstract: An electromagnetic flowmeter of this invention includes a measurement tube for passing a fluid to be measured, alternating magnetic field application means for applying alternating magnetic field and periodically switching magnetic fields applied in a first direction on a plane perpendicular to a direction in which the fluid flows and in a second direction opposite to the first direction, sampling means for sampling electromotive force caused in the fluid by the magnetic fields in the first and second directions by plural times in the same direction in one period, and arithmetic means for deriving the flow rate by the arithmetic process by excluding a sampling value which is contained in the sampling values obtained by the plurality of sampling operations and which exceeds a preset range or replacing the same by a simulated value.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: January 30, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Higuchi
  • Patent number: 4402299
    Abstract: An ignition coil energizing circuit is provided which has a signal generator for generating an output signal having a frequency corresponding to an engine rotational speed, a switching circuit connected to an ignition coil, a current detector for detecting a current flowing through the ignition coil, a duty control for supplying to the switching circuit a control signal having a duty cycle corresponding to a duty cycle of an output signal from the signal generator and controlling a conduction state of the switching circuit, and a current control circuit for controlling the switching circuit in response to an output signal generated from the current detector and maintaining a current flowing through the current detector at a predetermined value.
    Type: Grant
    Filed: October 6, 1981
    Date of Patent: September 6, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Satoshi Nakao, Yasuo Taguchi, Takashi Higuchi