Patents by Inventor Takashi Kumagai

Takashi Kumagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8547722
    Abstract: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: October 1, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Satoru Ito, Masahiko Moriguchi, Kazuhiro Maekawa, Noboru Itomi, Satoru Kodaira, Junichi Karasawa, Takashi Kumagai, Hisanobu Ishiyama, Takashi Fujise
  • Publication number: 20130245108
    Abstract: An object of the present invention is to provide a novel antischistosomal agent, and more specifically, to provide a novel drug capable of inhibiting a growth of schistosomes in vivo to prevent development of liver dysfunction due to eggs of the schistosomes in the case of infection with the schistosomes. The novel antischistosomal agent includes as an active ingredient a peroxide derivative. Specifically, the novel antischistosomal agent includes as an active ingredient a peroxide derivative represented by the general formula (I): where C represents an alicyclic hydrocarbon ring group which may be substituted, and n represents an integer of 1 to 6.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 19, 2013
    Applicant: National University Corporation Okayama University
    Inventors: Yusuke Wataya, Hye-Sook Kim, Akiko Hiramoto, Akira Sato, Nobuo Ota, Takashi Kumagai, Rieko Shimogawara, Toshie Taniguchi
  • Patent number: 8447698
    Abstract: A communication system includes a terminal having a first storage section for storing a number of pieces of content information, a second storage section for storing a number of pieces of the content information, a storage control section for placing a content ID stored in the second storage section into purchase information for each terminal and stored in the second storage section, an access control section for controlling access to the content information corresponding to the content ID stored in the second storage section, and an accounting setting section for setting an amount of a fee to be imposed on the terminal in response to the purchase information.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: May 21, 2013
    Assignee: Sony Corporation
    Inventors: Takashi Kumagai, Izuru Tanaka
  • Publication number: 20130050441
    Abstract: According to one embodiment, a video processing apparatus includes a viewer position detector, a viewing area information calculator, a keeping module, and a viewing area controller. The viewer position detector is configured to detect a position of a viewer using an image taken by a camera during displaying a two dimensional image. The viewing area information calculator is configured to calculate a control parameter so as to set a viewing area, in which a plurality of parallax images displayed on a display are viewed as a stereoscopic image, at an area depending on the position of the viewer. The keeping module is configured to keep the control parameter calculated. The viewing area controller is configured to set the viewing area according to the control parameter kept by the keeping module in synchronization with a change from displaying the two dimensional image to displaying a stereoscopic image.
    Type: Application
    Filed: February 23, 2012
    Publication date: February 28, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi Kumagai, Nobuyuki Ikeda, Hiroshi Fujimoto, Toshihiro Morohoshi
  • Publication number: 20130050417
    Abstract: According to one embodiment, a video processing apparatus includes a viewer position detector, a viewing area information calculator, a control information keeping module, and a viewing area controller. The viewer position detector is configured to detect a position of a viewer using an image taken by a camera. The viewing area information calculator is configured to calculate a first control parameter so as to set a viewing area, in which a plurality of parallax images displayed on a display are viewed as a stereoscopic image, at an area depending on the position of the viewer. The control information keeping module is configured to keep one or a plurality of second control parameters for setting the viewing area at a predetermined area. The viewing area controller is configured to set the viewing area according to the first control parameter or the second control parameter.
    Type: Application
    Filed: February 23, 2012
    Publication date: February 28, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tan WANG, Nobuyuki IKEDA, Hiroshi FUJIMOTO, Takashi KUMAGAI, Toshihiro MOROHOSHI
  • Patent number: 8345365
    Abstract: A processing unit performs a method including controlling a reading-out of data from a first storage medium at a predetermined read-out data rate to produce inputted data, and controlling a compression of the inputted data to produce first compressed data of a first compressed format. The method includes controlling a storage of the first compressed data in a second storage medium at a faster writing data rate than the predetermined read-out data rate, controlling a reading-out of second compressed data of a second compressed format from the second storage medium, and controlling a decompression of the second compressed data to produce decompressed data. The method also includes controlling simultaneously the storage of the first compressed data in the second storage medium, the reading-out of the second compressed data from the second storage medium, and audibly reproducing the decompressed data. The first compressed format is different from the second compressed format.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: January 1, 2013
    Assignee: Sony Corporation
    Inventors: Toshiyuki Arai, Takashi Kumagai, Hajime Inai, Hiroaki Sato, Fumitake Yodo, Masami Oyama
  • Patent number: 8339352
    Abstract: An integrated circuit device includes first to Nth circuit blocks (N is an integer of two or more) disposed along the long side of the integrated circuit device. One circuit block of the first to Nth circuit blocks is a logic circuit block, and another circuit block of the first to Nth circuit blocks is a programmable ROM of which at least part of data stored therein can be programmed by a user. The logic circuit block and the programmable ROM block are adjacently disposed along a first direction. At least part of information stored in the programmable ROM block is supplied to the logic circuit block.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 25, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Kanji Natori, Takashi Kumagai
  • Publication number: 20120319696
    Abstract: In a device having capacitive loads in which a plurality of capacitive loads are connected in parallel, power is supplied from an AC power source to a load group comprising the plurality of capacitive loads, the load group is divided into a plurality of small load groups, and a current detecting sensor for detecting a current which flows in at least one small load group at a side which is closer to the load side than a branch point at which the load group is divided into the plurality of small load groups and a current abnormality detecting part for determining an abnormality of a load by a current detecting signal which is detected by the current detecting sensor are equipped.
    Type: Application
    Filed: June 17, 2010
    Publication date: December 20, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazutoshi Kurahashi, Takashi Kumagai, Taichiro Tamida, Hajime Nakatani, Daisuke Takauchi
  • Publication number: 20120316958
    Abstract: A communication system includes a terminal having a first storage section for storing a number of pieces of content information, a second storage section for storing a number of pieces of the content information, a storage control section for placing a content ID stored in the second storage section into purchase information for each terminal and stored in the second storage section, an access control section for controlling access to the content information corresponding to the content ID stored in the second storage section, and an accounting setting section for setting an amount of a fee to be imposed on the terminal in response to the purchase information.
    Type: Application
    Filed: August 20, 2012
    Publication date: December 13, 2012
    Applicant: Sony Corporation
    Inventors: Takashi KUMAGAI, Izuru TANAKA
  • Patent number: 8310478
    Abstract: An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: November 13, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Kumagai, Hisanobu Ishiyama, Kazuhiro Maekawa, Satoru Ito, Takashi Fujise, Junichi Karasawa, Satoru Kodaira, Takayuki Saiki, Hiroyuki Takamiya
  • Patent number: 8249516
    Abstract: An output signal SHS is secondarily amplified by a high-frequency amplifier AMP3 and an output signal SHR is secondarily amplified by an AMP4 for which high-frequency side amplitude reducing means is taken. In this case, the AMP4 has small gain of a high-frequency region and its output SHR-2 is reduced in amplitude. However, a high-frequency noise has a frequency higher than that of a carrier wave SH and the amplitude of a noise NzB becomes smaller. The other output signal SHS is directly amplified by the wideband amplifier AMP3. The width of an SHS-2 and the width of the SHR-2 are adjusted by amplitude adjusting means throughout the whole region and then mutually added by both signals addition amplifying means again so that the amplitude of the output signal SHS is adjusted to the SHR-2, and a predetermined threshold value is set to extract the noises.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: August 21, 2012
    Inventors: Hideki Kumagai, Takashi Kumagai
  • Patent number: 8232830
    Abstract: A highly efficient rectifier can readily replace a two-terminal diode. Its conduction losses are reduced from that of the two-terminal diode. Connected between the source and drain of a MOSFET including a parasitic diode are a micro-power converter section for boosting a conduction voltage Vds between the source and drain to a predetermined voltage, and a self-drive control section that operates based on a voltage output from the micro-power converter section. When the source and drain are conductive with each other, the micro-power converter section generates, from the conduction voltage Vds, a power source voltage for the self-drive control section, and the self-drive control section (4) continues drive control of the MOSFET.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: July 31, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Miyuki Takeshita, Akihiko Iwata, Ikuro Suga, Shigeki Harada, Kenichi Kawabata, Takashi Kumagai, Kenji Fujiwara
  • Publication number: 20120187863
    Abstract: A power supply circuit drives circuits having different numbers of series-connected LEDs without changing a circuit constant or a component. An LED series circuit is connected to a power converter circuit of a power supply circuit. The power converter circuit is controlled by a control arithmetic circuit, and supplies a constant current to the LED series circuit. A voltage detection circuit detects a voltage applied to the LED series circuit. The control arithmetic circuit checks whether the LED series circuit has 40 LEDs or 20 LEDs, based on the voltage detected by the voltage detection circuit. The control arithmetic circuit holds a constant-current value table for 40 LEDs and a constant-current value table for 20 LEDs. In accordance with the detected voltage, the control arithmetic circuit selects one constant-current value table, and controls the power converter circuit based on the constant-current value table selected.
    Type: Application
    Filed: October 17, 2011
    Publication date: July 26, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takafumi NONAKA, Takashi KUMAGAI, Yuichiro ITO, Haruka KINOSHITA, Shinsuke FUNAYAMA, Takashi MAEDA
  • Patent number: 8225235
    Abstract: To provide a reproduction apparatus able to easily select a desired content data based on an attribute of the content data by a simple operation from a user and a reproduction method for the same, wherein the reproduction apparatus having: a display displaying the item; a first operation unit instructing a switch of the attribute; a second function unit instructing a selection of a predetermined item on the display; and a processing unit switching a first screen from a screen of a plurality of items so as to display a plurality of items when the first operation key is operated, and switching to a second screen displaying a plurality of item when the second operation key is operated when a plurality of item is displayed on the first screen.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: July 17, 2012
    Assignee: Sony Corporation
    Inventors: Naoko Takeda, Kissei Matsumoto, Takashi Kumagai, Toshihide Ooba, Hiroshi Iwata, Shingo Yamade
  • Publication number: 20120154538
    Abstract: According to one embodiment, an image processing apparatus including background image generator which generates background image, receiver which receives additional information, depth calculator which determines first depth based on additional information, and calculates second depth based on first depth, first three-dimensional image generator which generates first object image based on additional information, and generates first three-dimensional image based on first object image and first depth, second three-dimensional image generator which generates second object image based on additional information, and generates second three-dimensional image based on second object image and second depth, at least part of second three-dimensional image being displayed in area overlapping first three-dimensional image, image composite module which generates video signal by displaying background image, displaying second three-dimensional image in front of displayed background image, and displaying first three-dimensiona
    Type: Application
    Filed: November 18, 2011
    Publication date: June 21, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tamotsu HASEGAWA, Takashi Kumagai, Nobuyuki Ikeda
  • Publication number: 20120154539
    Abstract: According to one embodiment, an image processing apparatus including a background image generator which generates a background image, a receiver which receives additional information, a depth memory which stores in advance a depth for each of types of the additional information, a depth decide module which determines a type of the additional information received by the receiver, and reads a depth which is associated with the determined type from the depth memory, a three-dimensional image generator which generates an object image based on the additional information, and generates a three-dimensional image based on the object image and the depth which is read by the depth decide module, an image composite module which generates a video signal by displaying the background image and displaying the three-dimensional image in front of the displayed background image, and an output module which outputs the video signal generated by the image composite module.
    Type: Application
    Filed: November 18, 2011
    Publication date: June 21, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tamotsu Hasegawa, Takashi Kumagai, Nobuyuki Ikeda
  • Patent number: 8197310
    Abstract: A dust box includes: an attachment portion configured to be attached to a dust-discharging nozzle extending from a housing of an electric tool; and a dust-collecting portion connected to the attachment portion and configured to store dust particles to be discharged from the nozzle. The dust-collecting portion mainly consists of a box which is made of synthetic resin and configured to be detachably connected to the attachment portion, and a paper bag received in the box and configured to store the dust particles to be discharged from the nozzle.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: June 12, 2012
    Assignee: Makita Corporation
    Inventors: Yukio Yamashiro, Hirokazu Hagiwara, Yoshifumi Morita, Takashi Kumagai
  • Patent number: 8188544
    Abstract: An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 29, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Kumagai, Hisanobu Ishiyama, Kazuhiro Maekawa, Satoru Ito, Takashi Fujise, Junichi Karasawa, Satoru Kodaira, Takayuki Saiki, Hiroyuki Takamiya
  • Publication number: 20120120049
    Abstract: An integrated circuit device includes first to Nth circuit blocks (N is an integer of two or more) disposed along the long side of the integrated circuit device. One circuit block of the first to Nth circuit blocks is a logic circuit block, and another circuit block of the first to Nth circuit blocks is a programmable ROM of which at least part of data stored therein can be programmed by a user. The logic circuit block and the programmable ROM block are adjacently disposed along a first direction. At least part of information stored in the programmable ROM block is supplied to the logic circuit block.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 17, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kanji NATORI, Takashi KUMAGAI
  • Publication number: 20120120517
    Abstract: A processing unit performs a method including controlling a reading-out of data from a first storage medium at a predetermined read-out data rate to produce inputted data, and controlling a compression of the inputted data to produce first compressed data of a first compressed format. The method includes controlling a storage of the first compressed data in a second storage medium at a faster writing data rate than the predetermined read-out data rate, controlling a reading-out of second compressed data of a second compressed format from the second storage medium, and controlling a decompression of the second compressed data to produce decompressed data. The method also includes controlling simultaneously the storage of the first compressed data in the second storage medium, the reading-out of the second compressed data from the second storage medium, and audibly reproducing the decompressed data. The first compressed format is different from the second compressed format.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicant: Sony Corporation
    Inventors: Toshiyuki ARAI, Takashi Kumagai, Hajime Inai, Hiroaki Sato, Fumitake Yodo, Masami Oyama