Patents by Inventor Takashi Nakagawa

Takashi Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151428
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Application
    Filed: January 8, 2025
    Publication date: May 8, 2025
    Inventors: Takayuki IKEDA, Yoshiyuki KUROKAWA, Shintaro HARADA, Hidetomo KOBAYASHI, Roh YAMAMOTO, Kiyotaka KIMURA, Takashi NAKAGAWA, Yusuke NEGORO
  • Patent number: 12282024
    Abstract: An evaluating method includes an evaluating step of evaluating a state of ketosis in postpartum dairy cows for a dairy cow using at least one value of concentration values of Ala, Arg, Asn, Asp, BCAA, Cit, Cys, Glu, Gln, Gly, His, Ile, Leu, Lys, Met, 3MeHis, Orn, Phe, Pro, Ser, Tau, Thr, Trp, Tyr, and Val and concentration values of ALB, ALT, AST, BHBA, BUN, Ca, gGTP, Glc, NEFA, T-Bil, TCHO, TG, and TP in blood of the dairy cow before parturition.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: April 22, 2025
    Assignee: Ajinomoto Co., Inc.
    Inventors: Takashi Mikami, Akira Imaizumi, Takayuki Tanaka, Yuki Miyazawa, Mina Nakamura, Kazuki Nakagawa, Takeshi Fujieda
  • Patent number: 12278103
    Abstract: A technique includes: (a) providing a substrate having a first surface and a second surface; (b) modifying the first surface to be terminated with a hydrocarbon group by supplying a hydrocarbon group-containing gas to the substrate; and (c) forming a film on the second surface by supplying a precursor and an oxygen- and hydrogen-containing gas to the substrate after modifying the first surface.
    Type: Grant
    Filed: November 6, 2023
    Date of Patent: April 15, 2025
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Takayuki Waseda, Takashi Nakagawa, Kimihiko Nakatani, Motomu Degai, Takao Izaki, Yoshitomo Hashimoto
  • Patent number: 12277357
    Abstract: A related information providing method for providing related information comprises, controlling an image processing device, and executing a job pertaining to image processing that performs at least one of processing that reads a document and outputs or stores image data, or processing that loads print data and prints or stores image data; causing a user to select whether or not performing a search is permitted using extracted information, which is obtained by extracting information about at least one of a character or an image from image data of the document or the print data; extracting the extracted information from the image data when a search using the extracted information is permitted; searching a database stored in a data storage device for related information that relates to the extracted information; providing the user with the related information; and registering the extracted information and the image data in the database.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: April 15, 2025
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takashi Nakagawa
  • Publication number: 20250120277
    Abstract: A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 10, 2025
    Inventors: Takashi NAKAGAWA, Hidetomo KOBAYASHI, Hideaki SHISHIDO
  • Patent number: 12273641
    Abstract: In a solid-state imaging element provided with a comparator for each column, responsiveness of the comparator is improved. An input transistor outputs, from a drain, a potential within a range from one side to the other side of a pair of output potentials on the basis of whether or not an input potential input to a source and a predetermined reference potential input to a gate substantially coincide with each other. A first current source supplies a constant current. A capacitor is inserted between the source of the input transistor and a first current source. A cutoff switch disconnects a drain of the input transistor from a connection node within a predetermined period for initializing the connection node between the capacitor and the first current source to a lower one of the pair of output potentials, and connects the connection node with the drain of the input transistor outside the predetermined period.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Daisuke Nakagawa, Takashi Moue, Yoshio Awatani
  • Publication number: 20250092797
    Abstract: Provided are a variable geometry turbine and a turbocharger with the same. The variable geometry turbine is provided with a turbine impeller, a housing, a plurality of nozzle vanes, and a link mechanism. Inside the housing, a link compartment in which the link mechanism is accommodated is formed, the link compartment being separated from a nozzle flow path by a hub-side member having a hub side surface defining the nozzle flow path. The link mechanism and each of the plurality of nozzle vanes are coupled together via a nozzle shaft penetrating through the hub-side member. The hub-side member has at least one communication hole providing communication between the nozzle flow path and the link compartment. When each of the plurality of nozzle vanes is fully opened, the opening of the at least one communication hole on the nozzle flow path side is formed on the inner side radially of the turbine impeller than the leading edge of each of the plurality of nozzle vanes.
    Type: Application
    Filed: January 18, 2022
    Publication date: March 20, 2025
    Applicant: MITSUBISHI HEAVY INDUSTRIES ENGINE & TURBOCHARGER, LTD.
    Inventors: Bipin GUPTA, Takeru CHIBA, Hiroshi NAKAGAWA, Takashi YOSHIMOTO
  • Publication number: 20250087745
    Abstract: A sulfide solid electrolyte that contains lithium, phosphorus, sulfur, chlorine and bromine, wherein in powder X-ray diffraction analysis using CuK? rays, it has a diffraction peak A at 2?=25.2±0.5 deg and a diffraction peak B at 2?=29.7±0.5 deg, the diffraction peak A and the diffraction peak B satisfy the following formula (A), and a molar ratio of the chlorine to the phosphorus “c (Cl/P)” and a molar ratio of the bromine to the phosphorus “d (Br/P)” satisfies the following formula (1): 1.2 < c + d < 1.9 ( 1 ) 0.845 < S A / S B < 1.2 ( A ) where SA is an area of the diffraction peak A and SB is an area of the diffraction peak B.
    Type: Application
    Filed: November 21, 2024
    Publication date: March 13, 2025
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Futoshi UTSUNO, Kota TERAI, Takashi UMEKI, Masaru NAKAGAWA, Hiroshi YAMAGUCHI
  • Patent number: 12242095
    Abstract: Provided is an optical film that, when being incorporated into an image display device, can suppress the image display device from appearing pale. An optical film including a UV-absorbing layer containing a UV-absorbing agent B on a plastic film containing a UV-absorbing agent A, wherein fluorescence emission when the plastic film side is irradiated with excitation light having a wavelength of 365 nm and fluorescence emission when the UV-absorbing layer side is irradiated with excitation light having a wavelength of 365 nm satisfy a specific condition.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 4, 2025
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Seiichi Isojima, Junya Eguchi, Takashi Kuroda, Hiroki Nakagawa
  • Publication number: 20250067454
    Abstract: An HVAC system is provided. Embodiments of the present disclosure generally relate to an HVAC system in which multiple indoor units are coupled to central outdoor unit, where at least one of the indoor units is configured to provide conditioned air through ductwork and at least one indoor unit is configured to provide conditioned air without ductwork. Moreover, a gas furnace can be provided in the system, for harsher environments that benefit from more robust heating. Additional systems, devices, and methods are also disclosed.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Applicants: Daikin Manufacturing Company, L.P., Daikin Industries, Ltd.
    Inventors: Masahiro Honda, Junichi Shimoda, Takashi Shimamura, Yuuji Yamada, Hideyuki Nakagawa, Hiroyuki Imada, David Palazzolo, Joseph Kelly Hearnsberger, Sriram Venkat, Chris Bellshaw, John Clements, Masahiro Oka, Akinori Nakai, Cheng Li, Takahiro Yamada
  • Patent number: 12237021
    Abstract: A memory system includes first and second memory cells, and a controller configured to write data having a first value in the first memory cells and data having a second value in the second memory cells, determine a first voltage by executing a tracking process, and read data from the memory cells using the first voltage. In the tracking process, the controller performs a plurality of read operations to determine a first distribution of the memory cells, estimate a second distribution of the first memory cells based on the first distribution, calculate a third distribution of the second memory cells based on a difference between the first distribution and the second distribution, and determine a voltage that is within the third voltage as the first voltage based on the second distribution and the third distribution.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: February 25, 2025
    Assignee: Kioxia Corporation
    Inventor: Takashi Nakagawa
  • Publication number: 20250034739
    Abstract: Provided is a surface-treated steel sheet that can be produced without using hexavalent chromium and is excellent in adhesion to BPA-free paint and BPA-free painting corrosion resistance. A surface-treated steel sheet comprises: a steel sheet; a metallic Cr layer disposed on a surface of the steel sheet on at least one side; and a Cr oxide layer disposed on the metallic Cr layer, wherein a contact angle of ethylene glycol is 50° or less, and a total atomic ratio of K, Na, Mg, and Ca adsorbed on a surface of the surface-treated steel sheet on the at least one side to Cr is 5.0% or less.
    Type: Application
    Filed: February 20, 2023
    Publication date: January 30, 2025
    Applicant: JFE STEEL CORPORATION
    Inventors: Takashi UENO, Yusuke NAKAGAWA
  • Publication number: 20250033492
    Abstract: A conveying vehicle includes a power storage, a travel drive source driving a wheel of the conveying vehicle by being driven by electric power stored in the power storage, a travel control unit controlling driving of the travel drive source, and a power supply unit supplying electric power stored in the power storage to a towed vehicle as another vehicle.
    Type: Application
    Filed: December 13, 2022
    Publication date: January 30, 2025
    Applicant: DMG MORI CO., LTD
    Inventors: Hideki NAGASUE, Masaaki NAKAGAWA, Takashi ADACHI
  • Publication number: 20250037347
    Abstract: Described herein is a graphics processor comprising an instruction cache and a plurality of processing elements coupled with the instruction cache. The plurality of processing elements include functional units configured to provide an integer pipeline to execute instructions to perform operations on integer data elements. The integer pipeline including a first multiplier and a second multiplier, the first multiplier and the second multiplier configured to execute operations for a single instruction.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 30, 2025
    Applicant: Intel Corporation
    Inventors: Jiasheng Chen, Supratim Pal, Kevin Hurd, Jorge E. Parra Osorio, Christopher Spencer, Takashi Nakagawa, Guei-Yuan Lueh, Pradeep K. Golconda, James Valerio, Mukundan Swaminathan, Nicholas Murphy, Clifford Gibson, Li-An Tang, Fangwen Fu, Kaiyu Chen, Buqi Cheng
  • Patent number: 12205965
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: January 21, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
  • Patent number: 12200995
    Abstract: A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: January 14, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takashi Nakagawa, Hidetomo Kobayashi, Hideaki Shishido
  • Publication number: 20250006095
    Abstract: A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 2, 2025
    Inventors: Takashi NAKAGAWA, Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Shuichi KATSUI, Kiyotaka KIMURA
  • Patent number: 12183920
    Abstract: To provide a porous dielectric particle capable of achieving a lithium ion secondary battery having a high volumetric energy density, a high output, and being scarcely deteriorated in the output property even after charge and discharge are repeated, an electrode for a lithium ion secondary battery including the porous dielectric particle, and a lithium ion secondary battery using the electrode for a lithium ion secondary battery. A porous dielectric oxide is used, and this is dispersed and disposed in gaps between active material particles of an electrode. Specifically, as a particle to be blended in an electrode of a lithium ion secondary battery including an electrolytic solution, porous dielectric particles in which at least a part of a surface of porous core particles is coated with dielectric oxide is used.
    Type: Grant
    Filed: March 7, 2021
    Date of Patent: December 31, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Kazuki Saimen, Takashi Nakagawa, Yuka Nagatochi, Takeshi Fujino
  • Publication number: 20240417376
    Abstract: The present invention provides a novel compound having an excellent antitumor effect, stability and metabolic stability. The compound of the present invention is represented by the following general formula (1) wherein R1 represents a halogen atom, an aryl group, an aryloxy group or a lower alkyl group optionally substituted with one or more halogen atoms; R2 represents a hydrogen atom, a halogen atom, a lower alkyl group or a lower alkoxy group; and; m represents an integer of 1 to 3; provided that when m represents 2 or 3, R1s are the same or different.
    Type: Application
    Filed: August 26, 2024
    Publication date: December 19, 2024
    Applicant: OTSUKA PHARMACEUTICAL CO., LTD.
    Inventors: Takashi NAKAGAWA, Makoto SAKAMOTO, Kazuya YAMAGUCHI, Yuki TERAUCHI, Masamichi SHIRAKURA, Yasuo HARADA, Yutaka KOJIMA, Takumi SUMIDA
  • Patent number: 12165725
    Abstract: According to one embodiment, a memory system includes a non-volatile first memory with first storage areas. A controller executes a first read operation on a second storage area of the first storage areas. When an error correction in the first read operation fails, the controller acquires a first measured value being a value of a read voltage for suppressing the number of occurrences of error bits in the second storage area. The controller updates, on the basis of the first measured value, one of first candidate values of the read voltage with a second candidate value. When the error correction in a second read operation for a third storage area of the first storage areas fails, the controller executes the read operation once or more on the third storage area by using, as the read voltages, different first candidate values of the first candidate values.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: December 10, 2024
    Assignee: Kioxia Corporation
    Inventors: Ryo Yamaki, Masanobu Shirakawa, Naomi Takeda, Takashi Nakagawa, Shingo Yanagawa