Patents by Inventor Takashi Nakao
Takashi Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120104340Abstract: A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.Type: ApplicationFiled: January 6, 2012Publication date: May 3, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Yasuhito Yoshimizu, Fumiki Aiso, Atsushi Fukumoto, Takashi Nakao
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Publication number: 20120090535Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.Type: ApplicationFiled: September 22, 2011Publication date: April 19, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Ichiro Mizushima, Shinji Mori, Masahiko Murano, Tsutomu Sato, Takashi Nakao, Hiroshi Itokawa
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Patent number: 8159909Abstract: An optical head that includes a laser light source, an optical system that applies 0-order diffracted light, +1-order diffracted light, and ?1-order diffracted light, which are produced from laser light emitted from the laser light source, onto a recording medium having a plurality of information recording layers, and a light-receiving device for detecting reflected light guided by the optical system. The light-receiving device includes a first light-receiving section for detecting reflected light of the 0-order diffracted light, two second light-receiving sections for detecting reflected light of the +1-order diffracted light and reflected light of the ?1-order diffracted light, and a third light-receiving section provided near at least one of the second light-receiving sections to receive stray light reflected from one or more information recording layers other than a target information recording layer to be accessed.Type: GrantFiled: June 3, 2005Date of Patent: April 17, 2012Assignee: Sony CorporationInventor: Takashi Nakao
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Patent number: 8132481Abstract: A parallel mechanism includes a base, actuators attached to the base, a plurality of arms coupled together in parallel, and a sensing device. Each of the arms has a first link, one end of which is coupled to the actuator, a second link through which the other end of the first link and a bracket are coupled together, a ball joint through which one end of the second link and the other end of the first link are swingably coupled together, and a ball joint through which the other end of the second link and the bracket are swingably coupled together. Each of the ball joints includes a ball stud including a ball-shaped head, a socket swingably holding the ball-shaped head of the ball stud, and a conductive member interposed between the ball-shaped head and the socket. The sensing device senses when at least one of the plurality of ball joints is loose, based on whether or not the ball stud and the socket are electrically continuous with one another.Type: GrantFiled: April 1, 2009Date of Patent: March 13, 2012Assignee: Murata Machinery, Ltd.Inventors: Tatsuhiko Nishida, Hideaki Nakanishi, Takashi Nakao, Manabu Yamashita
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Patent number: 8118985Abstract: A gas sensor (200) has a gas sensor element (10) including a first measurement chamber (16); a first pumping cell (11) having a first interior pump electrode (11c) and its counterpart electrode (11b); a second measurement chamber (18); a second pumping cell (13) that has a second interior pump electrode (13b); and a beater (50). The heater (50) has a lead section (50a); a first resistance portion (50bx) having a higher resistance than the lead portion (50a); and a main heating portion (50k) having a second resistance portion (50by) having a higher resistance than the first resistance portion (50bx) disposed at a leading end side in a longitudinal direction relative to a leading end of the first resistance portion (50bx). The second interior pump electrode (13b) is located within the first resistance portion (50bx) in the longitudinal direction.Type: GrantFiled: April 2, 2009Date of Patent: February 21, 2012Assignee: NGK Spark Plug Co., Ltd.Inventors: Seiji Ohya, Tomohiro Wakazono, Takashi Nakao, Hisashi Sasaki, Koji Shiotani
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Patent number: 8114755Abstract: A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.Type: GrantFiled: June 25, 2008Date of Patent: February 14, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Mizushima, Yoshio Ozawa, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki, Masahiro Kiyotoshi, Minako Inukai, Kaori Umezawa, Hiroaki Yamada
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Patent number: 8115245Abstract: A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress.Type: GrantFiled: September 4, 2009Date of Patent: February 14, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yasuhito Yoshimizu, Fumiki Aiso, Atsushi Fukumoto, Takashi Nakao
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Publication number: 20120034754Abstract: A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidation processing at a first temperature to reform a surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms, and conducting a second oxidation processing at a second temperature which is higher than the first temperature to form a coated silicon oxide film inside the element isolation trenches.Type: ApplicationFiled: October 13, 2011Publication date: February 9, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Kazuaki Iwasawa, Takeshi Hoshi, Keisuke Nakazawa, Shogo Matsuo, Takashi Nakao, Ryu Kato, Tetsuya Kai, Katsuyuki Sekine
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Publication number: 20120031331Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.Type: ApplicationFiled: October 13, 2011Publication date: February 9, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
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Patent number: 8109171Abstract: An end effecter is positioned with high precision by stabilizing its attitude. Included are arms each having a pair of rods arranged in parallel, a bracket having the end effecter attached thereto and retained by the pair of rods, ball joints and each including a first joint element having a ball and displaceably connecting the bracket with the arm and a second joint element having a socket for retaining the ball, a connecting member for connecting the pair of parallel rods together and restricting rotation of the rods about an axis that is parallel to the longitudinal direction thereof, and a biasing member for providing a biasing force for retaining the ball in the socket.Type: GrantFiled: September 14, 2007Date of Patent: February 7, 2012Assignee: Murata Machinery Ltd.Inventors: Takashi Nakao, Tatsuhiko Nishida, Hideaki Nakanishi, Daigoro Nakamura
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Patent number: 8080463Abstract: A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidation processing at a first temperature to reform a surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms, and conducting a second oxidation processing at a second temperature which is higher than the first temperature to form a coated silicon oxide film inside the element isolation trenches.Type: GrantFiled: January 21, 2010Date of Patent: December 20, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Kazuaki Iwasawa, Takeshi Hoshi, Keisuke Nakazawa, Shogo Matsuo, Takashi Nakao, Ryu Kato, Tetsuya Kai, Katsuyuki Sekine
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Patent number: 8071483Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.Type: GrantFiled: September 22, 2009Date of Patent: December 6, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
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Patent number: 8043945Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.Type: GrantFiled: March 10, 2009Date of Patent: October 25, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Ichiro Mizushima, Shinji Mori, Masahiko Murano, Tsutomu Sato, Takashi Nakao, Hiroshi Itokawa
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Publication number: 20110232686Abstract: In one embodiment, a method of cleaning a semiconductor manufacturing apparatus includes supplying a cleaning gas for removing a deposition film deposited on an inside wall of a treatment chamber through a supply pipe of the treatment chamber so that a supply amount of the cleaning gas from the supply pipe per unit time is greater than an exhaust amount of the cleaning gas from an exhaust pipe of the treatment chamber per unit time. The method further includes supplying an inert gas to fill the supply pipe with the inert gas.Type: ApplicationFiled: March 18, 2011Publication date: September 29, 2011Inventors: Kenichiro Toratani, Takashi Nakao
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Patent number: 8017989Abstract: A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.Type: GrantFiled: March 17, 2010Date of Patent: September 13, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yoshio Ozawa, Ichiro Mizushima, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki, Masahiro Kiyotoshi
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Patent number: 8000189Abstract: An optical pickup includes: a light source that emits a light beam; an object lens that condenses the light beam on a target recording layer of an optical disk; a lens moving unit; a condensing lens; a hologram element that diffracts, in diffracting a reflected light beam and separating it into reflected zeroth-order and first-order light beams, parts of the reflected first-order light beam in a first direction and sets them as first and second beams, diffracts parts of the reflected first-order light beam in a second direction and sets them as third and fourth beams; and a photodetector that receives the first and second beams and the third and fourth beams and generates light reception signals, and receives interlayer stray light of a part of the light beam reflected by the other recording layers other than the target recording layer and generates a stray light reception signal.Type: GrantFiled: July 13, 2009Date of Patent: August 16, 2011Assignee: Sony CorporationInventors: Takashi Nakao, Fumiaki Nakano, Noriaki Nishi, Nobuhiko Ando, Hiroaki Nakagawa, Yutaka Tentaku
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Patent number: 7972104Abstract: A lower buffer 6 is placed under a traveling rail for an overhead traveling vehicle 16, and a side buffer 8 is provided on a side of the traveling rail. The overhead traveling vehicle 16 has a hoisting frame 30, and a lateral feeding unit 24 for laterally feeding the hoisting frame 30.Type: GrantFiled: March 30, 2006Date of Patent: July 5, 2011Assignee: Murata Kikai Kabushiki KaishaInventors: Tamotsu Shiwaku, Takashi Nakao
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Publication number: 20110114232Abstract: The present invention aims at providing: a method for manufacturing such a kind of gasket-oriented steel plate excellent in elasticity and formability, in a manner to allow for reduction of a breaking elongation of the steel plate to thereby improve a formability (punchability) thereof while improving a proof stress of the steel plate against a repeated stress from a discharge valve to thereby maintain a higher elasticity of the steel plate; and a gasket able to withstand the repeated stress from the discharge valve. The manufacturing method of a gasket-oriented steel plate of the present invention comprises the steps of: annealing a starting steel material having a composition of: Mn less than 0.5%, Ni less than 2.0%, and Cr less than 12.0%; and subsequently temper rolling the annealed starting steel material at a rolling reduction ratio of 10% or more; and the gasket of the present invention is formed by adopting a gasket-oriented steel plate obtained by the above manufacturing method.Type: ApplicationFiled: December 2, 2009Publication date: May 19, 2011Applicant: NOK CorporationInventors: Takashi Nakao, Nobuaki Tanaka
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Patent number: 7938406Abstract: A first gasket 10 is placed in a groove formed in a cam cover and seals a gap between a cylinder head and the cam cover. The first gasket 10 includes a pair of seal lips 13 which come into tight contact with the cylinder head and which are provided in parallel to each other, and a plurality of connecting portions 15 which are provided between the pair of seal lips 13, which are connected to each of the seal lips 13, and which hold a distance between the seal lips 13 near the connected portion.Type: GrantFiled: July 5, 2006Date of Patent: May 10, 2011Assignee: NOK CorporationInventors: Tomohisa Matsumoto, Takashi Nakao, Shuji Yoshitsune, Kazuki Takeno
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Publication number: 20110057249Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked structural body, a semiconductor pillar, and a memory unit. The stacked structural body is provided on a major surface of the substrate. The stacked structural body includes electrode films alternately stacked with inter-electrode insulating films in a direction perpendicular to the major surface. The pillar pierces the body in the direction. The memory unit is provided at an intersection between the pillar and the electrode films. The electrode films include at least one of amorphous silicon and polysilicon. The stacked structural body includes first and second regions. A distance from the second region to the substrate is greater than a distance from the first region to the substrate. A concentration of an additive included in the electrode film in the first region is different from that included in the electrode film in the second region.Type: ApplicationFiled: August 25, 2010Publication date: March 10, 2011Inventors: Takashi NAKAO, Kazuaki Iwasawa