Patents by Inventor Takatoshi ORUI
Takatoshi ORUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11024960Abstract: A scanning antenna includes a TFT substrate including a plurality of TFTs supported by a first dielectric substrate and a plurality of patch electrodes, a slot substrate including a slot electrode supported by a second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate disposed opposing the second dielectric substrate across a dielectric layer. The slot electrode includes a plurality of slots disposed corresponding to the plurality of patch electrodes, each patch electrode is connected to a drain of the corresponding TFT, the slot electrode includes Cu layers, and lower metal layers and/or an upper metal layer, and the lower metal layer and/or the upper metal layer decrease about a half or more of a tensile stress of the Cu layer.Type: GrantFiled: January 11, 2018Date of Patent: June 1, 2021Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Orui, Tadashi Ohtake, Wataru Nakamura, Kiyoshi Minoura, Kenichi Kitoh
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Publication number: 20210143016Abstract: An etching method of an exemplary embodiment involves providing a substrate in a chamber of a plasma treatment system. The substrate includes a silicon-containing film. The method further involves etching the silicon-containing film by a chemical species in plasma generated from a process gas in the chamber. The process gas contains a halogen gas component and phosphorous gas component.Type: ApplicationFiled: July 16, 2020Publication date: May 13, 2021Applicant: Tokyo Electron LimitedInventors: Takahiro YOKOYAMA, Maju TOMURA, Yoshihide KIHARA, Ryutaro SUDA, Takatoshi ORUI
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Publication number: 20210143028Abstract: An etching method enables plasma etching of a silicon-containing film with reduced lateral etching. The etching method includes providing a substrate in a chamber included in a plasma processing apparatus. The substrate includes a silicon-containing film. The etching method further includes setting a flow rate proportion of a phosphorus-containing gas with respect to a total flow rate of the process gas so as to establish a predetermined ratio of an etching rate of an alternate stack of a silicon oxide film and a silicon nitride film to an etching rate of the silicon oxide film.Type: ApplicationFiled: November 6, 2020Publication date: May 13, 2021Applicant: Tokyo Electron LimitedInventors: Takahiro YOKOYAMA, Maju TOMURA, Yoshihide KIHARA, Ryutaro SUDA, Takatoshi ORUI
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Patent number: 10998629Abstract: A liquid crystal panel of a scanning antenna includes a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode that is formed on a first main surface of the second dielectric substrate and includes a slot arranged so as to correspond to the patch electrode; and a liquid crystal layer provided between the TFT substrate and the slot substrate. One of the TFT substrate and the slot substrate includes a projecting layer formed of resin and disposed on the liquid crystal layer side of the patch electrode or the slot electrode in a region surrounded by a sealing portion. The projecting layer is arranged so as not to overlap the patch electrode or the slot.Type: GrantFiled: July 28, 2017Date of Patent: May 4, 2021Assignee: SHARP KABUSHIKI KAISHAInventors: Tadashi Ohtake, Takatoshi Orui, Wataru Nakamura, Kiyoshi Minoura, Masanobu Mizusaki
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Publication number: 20210098875Abstract: A liquid crystal panel of a scanning antenna includes a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode that is formed on a first main surface of the second dielectric substrate and includes a slot arranged so as to correspond to the patch electrode; and a liquid crystal layer provided between the TFT substrate and the slot substrate. One of the TFT substrate and the slot substrate includes a projecting layer formed of resin and disposed on the liquid crystal layer side of the patch electrode or the slot electrode in a region surrounded by a sealing portion. The projecting layer is arranged so as not to overlap the patch electrode or the slot.Type: ApplicationFiled: July 28, 2017Publication date: April 1, 2021Inventors: TADASHI OHTAKE, TAKATOSHI ORUI, WATARU NAKAMURA, KIYOSHI MINOURA, MASANOBU MIZUSAKI
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Publication number: 20200381822Abstract: A scanning antenna includes a TFT substrate including a plurality of TFTs supported by a first dielectric substrate and a plurality of patch electrodes, a slot substrate including a slot electrode supported by a second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate disposed opposing the second dielectric substrate across a dielectric layer. The slot electrode includes a plurality of slots disposed corresponding to the plurality of patch electrodes, each patch electrode is connected to a drain of the corresponding TFT, the slot electrode includes Cu layers, and lower metal layers and/or an upper metal layer, and the lower metal layer and/or the upper metal layer decrease about a half or more of a tensile stress of the Cu layer.Type: ApplicationFiled: January 11, 2018Publication date: December 3, 2020Inventors: Takatoshi ORUI, Tadashi OHTAKE, Wataru NAKAMURA, Kiyoshi MINOURA, Kenichi KITOH
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Patent number: 10840266Abstract: The scanning antenna (1000) is a scanning antenna in which antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including: a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including: a second dielectric substrate (51), and a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged in correspondence with the plurality of patch electrodes, and a thickness of the second dielectric substrate (51) is smaller than the thickness of the first dielectric substrate (1) at least in a region where the antenna units (U) are arranged.Type: GrantFiled: February 13, 2017Date of Patent: November 17, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Orui, Makoto Nakazawa, Wataru Nakamura, Kiyoshi Minoura, Tadashi Ohtake, Fumiki Nakano
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Patent number: 10777887Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, a plurality of TFTs, a plurality of gate bus lines, a plurality of source bus lines, and a plurality of patch electrodes, a slot substrate including a second dielectric substrate and a slot electrode (55) formed on the first main surface of the second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate provided opposing a second main surface opposite to the first main surface of the second dielectric substrate via a dielectric layer, and the slot electrode includes a plurality of slots arranged in accordance with the plurality of patch electrodes, and a groove configured to divide the slot electrode into two or more sections, and the TFT substrate includes an opposing metal part arranged opposing the groove, and when viewed from a normal line direction of the first dielectric substrate, the groove is covered with the opposing metal part in thType: GrantFiled: October 7, 2016Date of Patent: September 15, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Orui, Kiyoshi Minoura, Shigeyasu Mori, Makoto Nakazawa, Fumiki Nakano
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Publication number: 20200279873Abstract: The scanning antenna (1000) is a scanning antenna in which antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including: a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including: a second dielectric substrate (51), and a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged in correspondence with the plurality of patch electrodes, and a thickness of the second dielectric substrate (51) is smaller than the thickness of the first dielectric substrate (1) at least in a region where the antenna units (U) are arranged.Type: ApplicationFiled: February 13, 2017Publication date: September 3, 2020Inventors: TAKATOSHI ORUI, MAKOTO NAKAZAWA, WATARU NAKAMURA, KIYOSHI MINOURA, TADASHI OHTAKE, FUMIKI NAKANO
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Patent number: 10756409Abstract: A scanning antenna including: a TFT substrate including a first dielectric substrate, a TFT, a gate bus line, a source bus line, and a patch electrode; a slot substrate including a second dielectric substrate and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conductive plate. The scanning antenna has a tiling structure in which a plurality of scanning antenna portions are bonded together, and each of the plurality of scanning antenna portions includes a TFT substrate portion and a slot substrate portion.Type: GrantFiled: October 6, 2016Date of Patent: August 25, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Kiyoshi Minoura, Shigeyasu Mori, Makoto Nakazawa, Fumiki Nakano, Takatoshi Orui
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Patent number: 10720701Abstract: A scanning antenna is a scanning antenna in which antenna units U are arranged, and includes a TFT substrate including a first dielectric substrate, TFTs, a plurality of gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer LC provided between the TFT substrate and the slot substrate; and a reflective conductive plate provided opposing a second main surface of the second dielectric substrate opposite to the first main surface via a dielectric layer. The slot electrode includes slots arranged in correspondence with the plurality of patch electrodes, and each of the patch electrodes is connected to a drain of a corresponding TFT and is supplied with a data signal from a corresponding source bus line while selected by a scanning signal supplied from the gate bus line of the corresponding TFT.Type: GrantFiled: October 6, 2016Date of Patent: July 21, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Fumiki Nakano, Kiyoshi Minoura, Shigeyasu Mori, Makoto Nakazawa, Takatoshi Orui
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Patent number: 10637156Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, TFTs supported by the first dielectric substrate, gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conduction plate facing a second main surface of the second dielectric substrate—on a side opposite the first main surface with a dielectric layer therebetween. The slot electrode includes slots disposed corresponding to the patch electrodes, and each of the patch electrodes is connected to the drain of a corresponding TFT.Type: GrantFiled: May 19, 2017Date of Patent: April 28, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Tadashi Ohtake, Kiyoshi Minoura, Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura
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Patent number: 10498019Abstract: A scanning antenna (1000) in which a plurality of antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) and a slot electrode (55) formed on a first main surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) disposed opposing via a dielectric layer (54) a second main surface opposite to the first main surface of the second dielectric substrate, (51) wherein the slot electrode includes slots disposed corresponding to the respective patch electrodes, and a heater part (68) is further provided on the outside of the TFT substrate (101) or on the outside of the slot substrate (201).Type: GrantFiled: October 17, 2016Date of Patent: December 3, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Tadashi Ohtake, Kiyoshi Minoura, Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura, Fumiki Nakano
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Publication number: 20190190162Abstract: Disclosed is a liquid crystal panel of a scanning antenna including a transmission and/or reception region in which a plurality of antenna units are arrayed, and a non-transmission and/or reception region, the liquid crystal panel including: a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate and including a slot arranged so as to correspond to the patch electrode; a liquid crystal layer provided between the TFT substrate and the slot substrate and including a plurality of liquid crystal regions; and a plurality of sealing portions that respectively surround the plurality of liquid crystal regions and bond the TFT substrate and the slot substrate together.Type: ApplicationFiled: August 3, 2017Publication date: June 20, 2019Applicant: SHARP KABUSHIKI KAISHAInventors: TADASHI OHTAKE, TAKATOSHI ORUI, WATARU NAKAMURA, KIYOSHI MINOURA, MASANOBU MIZUSAKI
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Publication number: 20190148838Abstract: A scanning antenna includes a TFT substrate including a first dielectric substrate, TFTs supported by the first dielectric substrate, gate bus lines, source bus lines, and patch electrodes; a slot substrate including a second dielectric substrate, and a slot electrode formed on a first main surface of the second dielectric substrate; a liquid crystal layer provided between the TFT substrate and the slot substrate; and a reflective conduction plate facing a second main surface of the second dielectric substrate—on a side opposite the first main surface with a dielectric layer therebetween. The slot electrode includes slots disposed corresponding to the patch electrodes, and each of the patch electrodes is connected to the drain of a corresponding TFT.Type: ApplicationFiled: May 19, 2017Publication date: May 16, 2019Applicants: SHARP KABUSHIKI KAISHA, SHARP KABUSHIKI KAISHAInventors: TADASHI OHTAKE, KIYOSHI MINOURA, MAKOTO NAKAZAWA, TAKATOSHI ORUI, WATARU NAKAMURA
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Patent number: 10177444Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged so as to correspond to the patch electrodes. As seen from the normal direction to the first dielectric substrate, a plurality of spacer structures (75) provided between the TFT substrate and the slot substrate are arranged so as not to overlap with first regions (Rp1) and/or second regions (Rp2), where the first regions are regions that are within a distance of 0.3 mm from edges of the slots and the second regions are regions that are within a distance of 0.Type: GrantFiled: October 25, 2016Date of Patent: January 8, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura, Tadashi Ohtake, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20190006746Abstract: A scanning antenna (1000) in which a plurality of antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) and a slot electrode (55) formed on a first main surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) disposed opposing via a dielectric layer (54) a second main surface opposite to the first main surface of the second dielectric substrate, (51) wherein the slot electrode includes slots disposed corresponding to the respective patch electrodes, and a heater part (68) is further provided on the outside of the TFT substrate (101) or on the outside of the slot substrate (201).Type: ApplicationFiled: October 17, 2016Publication date: January 3, 2019Inventors: TADASHI OHTAKE, KIYOSHI MINOURA, MAKOTO NAKAZAWA, TAKATOSHI ORUI, WATARU NAKAMURA, FUMIKI NAKANO
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Patent number: 10170826Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.Type: GrantFiled: October 6, 2016Date of Patent: January 1, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Takatoshi Orui, Shigeyasu Mori, Fumiki Nakano, Kiyoshi Minoura
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Patent number: 10153550Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna comprising: a TFT substrate including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51), and a slot electrode (55) formed on a first primary surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) arranged so as to oppose a second primary surface of the second dielectric substrate (51) with a dielectric layer (54) interposed therebetween, the second primary surface being on an opposite side from the first primary surface.Type: GrantFiled: October 14, 2016Date of Patent: December 11, 2018Assignee: SHARP KABUSHIKI KAISHAInventors: Takatoshi Orui, Shigeyasu Mori, Makoto Nakazawa, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20180337446Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.Type: ApplicationFiled: October 6, 2016Publication date: November 22, 2018Inventors: Makoto NAKAZAWA, Takatoshi ORUI, Shigeyasu MORI, Fumiki NAKANO, Kiyoshi MINOURA