Abstract: An experiment support apparatus includes: one or more non-transitory computer-readable media that include an instruction; and one or more processors that execute the instruction. The instruction is configured to cause the one or more processors to execute an operation, the operation includes: causing a display device to display a condition table TB that indicates an experiment condition for measurement, in response to an input of the experiment condition; and causing the display device to display at least one of a measurement result based on measurement data, or an analysis result of the measurement data, in a cell of the condition table TB, in response to an input of the measurement data, the measurement data being obtained using a measurement apparatus under the experiment condition corresponding to the cell.

Abstract: A treatment method performed by a film processing apparatus including: a first discharge electrode unit and a second discharge electrode unit respectively including magnets that form a magnetic field; and an AC power source capable of alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit. In the treatment method, a predetermined surface treatment of a film F is performed by generating a plasma P while alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit by using high-frequency power supplied from the AC power source.

Abstract: A method for designing the cross-sectional shape of the fuselage of a flying body having the fuselage extending in the roll axial direction, the section being taken on a plane perpendicular to the roll axial direction. This method is provided with: an initial setting step S12 for setting an initial cross-sectional shape, which is the initial cross-sectional shape of the fuselage having a cross-sectional shape that is not truly circular; load application steps S14, S21, S28 for analytically or experimentally preloading the fuselage having the initial cross-sectional shape; and a design shape setting step S17 for acquiring the cross-sectional shape of the preloaded fuselage as the design cross-sectional shape of the fuselage.

Abstract: A gas barrier film includes a substrate containing polypropylene as a main component, a gas barrier layer on a first surface of the substrate, and a coating layer on the gas barrier layer. Infrared spectroscopy of the first surface indicates a peak intensity (I1) at 1360 to 1390 cm?1 and a peak intensity (I2) at 1440 to 1480 cm?1 in a ratio satisfying the formula: (I1)/I(2)?1.65.

Abstract: A treatment method performed by a film processing apparatus including: a first discharge electrode unit and a second discharge electrode unit respectively including magnets that form a magnetic field; and an AC power source capable of alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit. In the treatment method, a predetermined surface treatment of a film F is performed by generating a plasma P while alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit by using high-frequency power supplied from the AC power source.

Abstract: A method for designing the cross-sectional shape of the fuselage of a flying body having the fuselage extending in the roll axial direction, the section being taken on a plane perpendicular to the roll axial direction. This method is provided with: an initial setting step S12 for setting an initial cross-sectional shape, which is the initial cross-sectional shape of the fuselage having a cross-sectional shape that is not truly circular; load application steps S14, S21, S28 for analytically or experimentally preloading the fuselage having the initial cross-sectional shape; and a design shape setting step S17 for acquiring the cross-sectional shape of the preloaded fuselage as the design cross-sectional shape of the fuselage.

Abstract: A microshaft forming method and apparatus for forming a microshaft without requiring high level of stillness required by conventional methods. The microshaft forming apparatus comprises an elongated electrode (1) to be formed into a microshaft, a forming plate (3) for forming the electrode (1), electrode rotating means for rotating the electrode (1) around the length direction (1a) of the electrode (1), a discharge machining power supply (5) for applying a voltage between the electrode (1) and the forming plate (3) to cause discharge between the electrode (1) and the forming plate (3), and electrode moving means for traversing the electrode (1) rotated by the electrode rotating means across the forming plate (3) from the side edge surface (3a) of the forming plate (3).

Abstract: An anti-reflection film, including: a transparent base film; and an anti-reflection stacked member provided on the hard coating, having, in alternation, a high-refractivity oxide thin film layer and a low-refractivity oxide thin film layer, wherein: an outermost layer of the anti-reflection stacked member is the low-refractivity oxide thin film layer; the low-refractivity oxide thin film layer is a silicon oxide thin film; a thickness of the silicon oxide thin film is in a range of 75 nm or greater, and 100 nm or smaller; the silicon oxide thin film has a first layer on a side of the transparent base film, and a second layer on an outside of the first layer; and a composition ratio Si/O (A) of silicon to oxygen in the first layer and a composition ratio Si/O (B) of silicon to oxygen in the second layer satisfies a relationship, Si/O (A)>Si/O (B).

Abstract: It is difficult to check the mounted state of solder by means of visual inspection after the mounting of a semiconductor device according to a conventional art, in particular, a CSP-semiconductor device, to a substrate and a problem arises wherein defective products increase and yield decreases. Terminals 50, 51, 52 and 53 for external connection are exposed from second main surface 412 of first insulating substrate 41 in the semiconductor device according to the present invention. Thus, second insulating substrate 48 is adhered to second main surface 412 so as to surround the internal portions of these terminals for external connection. Thereby, second insulating substrate 48 serves as a background mirror so that the mounted state of deep portions of the solder can be ascertained at the time of visual inspection of the mounted state of solder after the mounting of the semiconductor device to the substrate.

Abstract: A lead frame has an array of mounting portions connected by joint bars, and each of the mounting portions has an island serving as an external connection terminal and a plurality of lead terminals extending from the island and serving as external connection terminals for a semiconductor chip to be mounted on an adjacent island along the array. An electrically conductive paste is applied to the island, and a semiconductor chip is mounted on the island. Then, the semiconductor chip is electrically connected to the lead terminals by wires. A resin layer is deposited over the semiconductor chip, a principal surface of the island, and principle surfaces the lead terminals, while leaving opposite surfaces of the island and the lead terminals exposed. A region surrounding the island and the lead terminals electrically connected to the island is cut off into a package.

Abstract: An object of the present invention is to provide a method of fabricating a semiconductor device having a relatively small package structure and hence a relatively small mounting area. Another object of the present invention is to provide a method of fabricating a semiconductor device relatively inexpensively. An insulating board with a plurality of device carrier areas thereon is prepared, and islands and leads are formed on the device carrier areas electrically connected via through holes to external electrodes on the back of the insulating board. The external electrodes are spaced or retracted inwardly from edges of the device carrier areas. Semiconductor chips are mounted on the respective device carrier areas by die bonding and wire bonding, and then covered with a common resin layer. The resin layer and the insulating board are separated along cutting lines into segments including the device carrier areas thereby to produce individual semiconductor devices.

Abstract: The present invention provides a method for manufacturing a semiconductor device comprising steps of: bonding one semiconductor chip to each of multiple mounting portions of a substrate; covering the semiconductor chips bonded to the mounting portions with a common resin layer; bringing the substrate into contact with the resin layer and gluing the substrate to an adhesive sheet; and performing dicing and measurement for the semiconductor chips that are glued to the adhesive sheet.

Abstract: It is difficult to check the mounted state of solder by means of visual inspection after the mounting of a semiconductor device according to a conventional art, in particular, a CSP-semiconductor device, to a substrate and a problem arises wherein defective products increase and yield decreases. Terminals 50, 51, 52 and 53 for external connection are exposed from second main surface 412 of first insulating substrate 41 in the semiconductor device according to the present invention. Thus, second insulating substrate 48 is adhered to second main surface 412 so as to surround the internal portions of these terminals for external connection. Thereby, second insulating substrate 48 serves as a background mirror so that the mounted state of deep portions of the solder can be ascertained at the time of visual inspection of the mounted state of solder after the mounting of the semiconductor device to the substrate.

Abstract: An object of the present invention is to provide a method of fabricating a semiconductor device having a relatively small package structure and hence a relatively small mounting area. An insulating board with a plurality of device carrier areas thereon is prepared, and semiconductor chips are mounted on the respective device carrier areas and then covered with a common resin layer. The resin layer and said insulating board are separated along dicing lines into segments including the device carrier areas thereby to produce individual semiconductor devices. External electrodes connected to electrodes of the semiconductor chips are mounted on the back of the insulating board. The external electrodes are positioned symmetrically with respect to central lines of the packaged semiconductor device for preventing various problems which would otherwise be caused when such a small package is mounted.

Abstract: An object of the present invention is to provide a method of manufacturing a semiconductor device which enables a decrease in mounting area on a printed circuit board and an increase in space efficiency on the printed circuit board.

Abstract: A lead frame has an array of mounting portions connected by joint bars, and each of the mounting portions has an island serving as an external connection terminal and a plurality of lead terminals extending from the island and serving as external connection terminals for a semiconductor chip to be mounted on an adjacent island along the array. An electrically conductive paste is applied to the island, and a semiconductor chip is mounted on the island. Then, the semiconductor chip is electrically connected to the lead terminals by wires. A resin layer is deposited over the semiconductor chip, a principal surface of the island, and principle surfaces the lead terminals, while leaving opposite surfaces of the island and the lead terminals exposed. A region surrounding the island and the lead terminals electrically connected to the island is cut off into a package.

Abstract: The object of the present invention is to provide a semiconductor device having small mounting area with reduced cost.

Abstract: A lead frame has an array of mounting portions connected by joint bars, and each of the mounting portions has an island serving as an external connection terminal and a plurality of lead terminals extending from the island and serving as external connection terminals for a semiconductor chip to be mounted on an adjacent island along the array. An electrically conductive paste is applied to the island, and a semiconductor chip is mounted on the island. Then, the semiconductor chip is electrically connected to the lead terminals by wires. A resin layer is deposited over the semiconductor chip, a principal surface of the island, and principle surfaces the lead terminals, while leaving opposite surfaces of the island and the lead terminals exposed. A region surrounding the island and the lead terminals electrically connected to the island is cut off into a package.

Abstract: A method of fabricating a semiconductor device including preparing a board with a plurality of device carrier areas thereon and an electrode pattern serving as external electrodes on a back of the board. Semiconductor chips are fixed respectively to the device carrier areas. The semiconductor chips fixed to the device carrier areas are covered with a common resin layer. A round surface of the common resin layer is flattened into a flat and horizontal surface, and a dicing sheet is applied to the flat and horizontal surface of the common resin layer with electrode pattern facing upwardly. The board and the common resin layer are separated into segments including the device carrier areas thereby to produce individual semiconductor devices by dicing from the back of the board.

Abstract: An object of the present invention is to provide a method of fabricating a semiconductor device having a relatively small package structure and hence a relatively small mounting area.